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From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: ville.syrjala@intel.com, maarten.lankhorst@intel.com
Subject: [v5 2/6] drm/i915: Sanitize crtc gamma mode
Date: Tue,  8 Jan 2019 13:07:29 +0530	[thread overview]
Message-ID: <1546933053-10731-3-git-send-email-uma.shankar@intel.com> (raw)
In-Reply-To: <1546933053-10731-1-git-send-email-uma.shankar@intel.com>

Sanitize crtc gamma mode and update the mode in driver in case
BIOS has setup a different gamma mode as to what is expected by
driver. There is restriction on HSW platform not to read/write
color LUT's if ips is enabled. Handled the same accordingly.

Credits-to: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 696e6f5..03c8f68 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -15401,6 +15401,23 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc,
 		}
 	}
 
+	/*
+	 * Sanitize gamma mode incase BIOS leaves it in SPLIT GAMMA MODE
+	 * Workaround HSW : Do not read or write the pipe palette/gamma data
+	 * while GAMMA_MODE is configured for split gamma and IPS_CTL has IPS
+	 * enabled.
+	 */
+	if (IS_HASWELL(dev_priv)) {
+		if (crtc_state->ips_enabled)
+			hsw_disable_ips(crtc_state);
+
+		intel_color_set_csc(crtc_state);
+		intel_color_load_luts(crtc_state);
+
+		if (crtc_state->ips_enabled)
+			hsw_enable_ips(crtc_state);
+	}
+
 	/* Adjust the state of the output pipe according to whether we
 	 * have active connectors/encoders. */
 	if (crtc_state->base.active && !intel_crtc_has_encoders(crtc))
-- 
1.9.1

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  parent reply	other threads:[~2019-01-08  7:14 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-08  7:37 [v5 0/6] Add support for Gen 11 pipe color features Uma Shankar
2019-01-08  7:37 ` [v5 1/6] drm/i915: Check for Null for color lut callbacks Uma Shankar
2019-01-10 22:27   ` Matt Roper
2019-01-11 15:28     ` Shankar, Uma
2019-01-08  7:37 ` Uma Shankar [this message]
2019-01-10 22:38   ` [v5 2/6] drm/i915: Sanitize crtc gamma mode Matt Roper
2019-01-11 15:23     ` Shankar, Uma
2019-01-08  7:37 ` [v5 3/6] drm/i915: Remove gamma_mode state variable Uma Shankar
2019-01-08  7:37 ` [v5 4/6] drm/i915/icl: Add icl pipe degamma and gamma support Uma Shankar
2019-01-11 22:18   ` Matt Roper
2019-01-16 15:51     ` Shankar, Uma
2019-01-08  7:37 ` [v5 5/6] drm/i915/icl: Enable ICL Pipe CSC block Uma Shankar
2019-01-11 22:59   ` Matt Roper
2019-01-16 15:55     ` Shankar, Uma
2019-01-08  7:37 ` [v5 6/6] drm/i915/icl: Add degamma and gamma lut size to gen11 caps Uma Shankar
2019-01-11 23:04   ` Matt Roper
2019-01-16 15:57     ` Shankar, Uma
2019-01-08  7:52 ` ✓ Fi.CI.BAT: success for Add support for Gen 11 pipe color features (rev5) Patchwork
2019-01-08  9:09 ` ✗ Fi.CI.IGT: failure " Patchwork

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