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From: swati2.sharma@intel.com
To: dri-devel@lists.freedesktop.org
Cc: juhapekka.heikkila@gmail.com, daniel.vetter@ffwll.ch,
	intel-gfx@lists.freedesktop.org, stanislav.lisovskiy@intel.com
Subject: [PATCH 4/7] drm/i915: enable P010, P012, P016 formats for primary and sprite planes
Date: Fri,  8 Feb 2019 19:17:22 +0530	[thread overview]
Message-ID: <1549633645-29616-5-git-send-email-swati2.sharma@intel.com> (raw)
In-Reply-To: <1549633645-29616-1-git-send-email-swati2.sharma@intel.com>

From: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>

Enabling of P010, P012 and P016 formats. These formats will
extend NV12 for larger bit depths.

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
 drivers/gpu/drm/i915/intel_sprite.c | 28 ++++++++++++++++++++++++++--
 1 file changed, 26 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index d4e436a..a120266 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1819,6 +1819,25 @@ int intel_sprite_set_colorkey_ioctl(struct drm_device *dev, void *data,
 	DRM_FORMAT_NV12,
 };
 
+static const uint32_t glk_planar_formats[] = {
+	DRM_FORMAT_C8,
+	DRM_FORMAT_RGB565,
+	DRM_FORMAT_XRGB8888,
+	DRM_FORMAT_XBGR8888,
+	DRM_FORMAT_ARGB8888,
+	DRM_FORMAT_ABGR8888,
+	DRM_FORMAT_XRGB2101010,
+	DRM_FORMAT_XBGR2101010,
+	DRM_FORMAT_YUYV,
+	DRM_FORMAT_YVYU,
+	DRM_FORMAT_UYVY,
+	DRM_FORMAT_VYUY,
+	DRM_FORMAT_NV12,
+	DRM_FORMAT_P010,
+	DRM_FORMAT_P012,
+	DRM_FORMAT_P016,
+};
+
 static const u64 skl_plane_format_modifiers_noccs[] = {
 	I915_FORMAT_MOD_Yf_TILED,
 	I915_FORMAT_MOD_Y_TILED,
@@ -2101,8 +2120,13 @@ struct intel_plane *
 		plane->update_slave = icl_update_slave;
 
 	if (skl_plane_has_planar(dev_priv, pipe, plane_id)) {
-		formats = skl_planar_formats;
-		num_formats = ARRAY_SIZE(skl_planar_formats);
+		if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) {
+			formats = glk_planar_formats;
+			num_formats = ARRAY_SIZE(glk_planar_formats);
+		} else {
+			formats = skl_planar_formats;
+			num_formats = ARRAY_SIZE(skl_planar_formats);
+		}
 	} else {
 		formats = skl_plane_formats;
 		num_formats = ARRAY_SIZE(skl_plane_formats);
-- 
1.9.1

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  parent reply	other threads:[~2019-02-08 13:47 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-08 13:47 [PATCH 0/7] Enable P0xx (planar), Y2xx and Y4xx (packed) pixel formats swati2.sharma
2019-02-08 13:47 ` [PATCH 1/7] drm: Add P010, P012, P016 format definitions and fourcc swati2.sharma
2019-02-08 17:23   ` Daniel Vetter
2019-02-08 13:47 ` [PATCH 2/7] drm/i915: Add P010, P012, P016 plane control definitions swati2.sharma
2019-02-08 13:47 ` [PATCH 3/7] drm/i915: preparations for enabling P010, P012, P016 formats swati2.sharma
2019-02-08 13:47 ` swati2.sharma [this message]
2019-02-08 13:47 ` [PATCH 5/7] drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc swati2.sharma
2019-02-08 14:57   ` Maarten Lankhorst
2019-02-08 13:47 ` [PATCH 6/7] drm/i915/icl: Add Y2xx and Y4xx (xx:10/12/16) plane control definitions swati2.sharma
2019-02-08 13:47 ` [PATCH 7/7] drm/i915/icl: Enabling Y2xx and Y4xx (xx:10/12/16) formats for universal planes swati2.sharma
2019-02-08 15:10 ` ✗ Fi.CI.CHECKPATCH: warning for Enable P0xx (planar), Y2xx and Y4xx (packed) pixel formats Patchwork
2019-02-08 15:16 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-02-08 15:31 ` ✓ Fi.CI.BAT: success " Patchwork
2019-02-08 18:06 ` ✓ Fi.CI.IGT: " Patchwork

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