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From: swati2.sharma@intel.com
To: dri-devel@lists.freedesktop.org
Cc: linux-media@vger.kernel.org, intel-gfx@lists.freedesktop.org,
	narmstrong@baylibre.com, clinton.a.taylor@intel.com,
	ayaka@soulik.info, ayan.halder@arm.com,
	maxime.ripard@bootlin.com, daniel@fooishbar.org,
	juhapekka.heikkila@gmail.com, maarten.lankhorst@linux.intel.com,
	stanislav.lisovskiy@intel.com, daniel.vetter@ffwll.ch,
	ville.syrjala@linux.intel.com,
	Swati Sharma <swati2.sharma@intel.com>
Subject: [PATCH 3/6] drm/i915: Enable P010, P012, P016 formats for primary and sprite planes
Date: Fri,  1 Mar 2019 13:46:24 +0530	[thread overview]
Message-ID: <1551428187-12535-4-git-send-email-swati2.sharma@intel.com> (raw)
In-Reply-To: <1551428187-12535-1-git-send-email-swati2.sharma@intel.com>

From: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>

Enabling of P010, P012 and P016 formats. These formats will
extend NV12 for larger bit depths.

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_sprite.c | 28 ++++++++++++++++++++++++++--
 1 file changed, 26 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 1be7d59..0db3c5d 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1832,6 +1832,25 @@ int intel_sprite_set_colorkey_ioctl(struct drm_device *dev, void *data,
 	DRM_FORMAT_NV12,
 };
 
+static const uint32_t glk_planar_formats[] = {
+	DRM_FORMAT_C8,
+	DRM_FORMAT_RGB565,
+	DRM_FORMAT_XRGB8888,
+	DRM_FORMAT_XBGR8888,
+	DRM_FORMAT_ARGB8888,
+	DRM_FORMAT_ABGR8888,
+	DRM_FORMAT_XRGB2101010,
+	DRM_FORMAT_XBGR2101010,
+	DRM_FORMAT_YUYV,
+	DRM_FORMAT_YVYU,
+	DRM_FORMAT_UYVY,
+	DRM_FORMAT_VYUY,
+	DRM_FORMAT_NV12,
+	DRM_FORMAT_P010,
+	DRM_FORMAT_P012,
+	DRM_FORMAT_P016,
+};
+
 static const u64 skl_plane_format_modifiers_noccs[] = {
 	I915_FORMAT_MOD_Yf_TILED,
 	I915_FORMAT_MOD_Y_TILED,
@@ -2114,8 +2133,13 @@ struct intel_plane *
 		plane->update_slave = icl_update_slave;
 
 	if (skl_plane_has_planar(dev_priv, pipe, plane_id)) {
-		formats = skl_planar_formats;
-		num_formats = ARRAY_SIZE(skl_planar_formats);
+		if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) {
+			formats = glk_planar_formats;
+			num_formats = ARRAY_SIZE(glk_planar_formats);
+		} else {
+			formats = skl_planar_formats;
+			num_formats = ARRAY_SIZE(skl_planar_formats);
+		}
 	} else {
 		formats = skl_plane_formats;
 		num_formats = ARRAY_SIZE(skl_plane_formats);
-- 
1.9.1


WARNING: multiple messages have this Message-ID (diff)
From: swati2.sharma@intel.com
To: dri-devel@lists.freedesktop.org
Cc: narmstrong@baylibre.com, maxime.ripard@bootlin.com,
	daniel.vetter@ffwll.ch, intel-gfx@lists.freedesktop.org,
	ayaka@soulik.info, ayan.halder@arm.com,
	linux-media@vger.kernel.org
Subject: [PATCH 3/6] drm/i915: Enable P010, P012, P016 formats for primary and sprite planes
Date: Fri,  1 Mar 2019 13:46:24 +0530	[thread overview]
Message-ID: <1551428187-12535-4-git-send-email-swati2.sharma@intel.com> (raw)
In-Reply-To: <1551428187-12535-1-git-send-email-swati2.sharma@intel.com>

From: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>

Enabling of P010, P012 and P016 formats. These formats will
extend NV12 for larger bit depths.

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_sprite.c | 28 ++++++++++++++++++++++++++--
 1 file changed, 26 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 1be7d59..0db3c5d 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1832,6 +1832,25 @@ int intel_sprite_set_colorkey_ioctl(struct drm_device *dev, void *data,
 	DRM_FORMAT_NV12,
 };
 
+static const uint32_t glk_planar_formats[] = {
+	DRM_FORMAT_C8,
+	DRM_FORMAT_RGB565,
+	DRM_FORMAT_XRGB8888,
+	DRM_FORMAT_XBGR8888,
+	DRM_FORMAT_ARGB8888,
+	DRM_FORMAT_ABGR8888,
+	DRM_FORMAT_XRGB2101010,
+	DRM_FORMAT_XBGR2101010,
+	DRM_FORMAT_YUYV,
+	DRM_FORMAT_YVYU,
+	DRM_FORMAT_UYVY,
+	DRM_FORMAT_VYUY,
+	DRM_FORMAT_NV12,
+	DRM_FORMAT_P010,
+	DRM_FORMAT_P012,
+	DRM_FORMAT_P016,
+};
+
 static const u64 skl_plane_format_modifiers_noccs[] = {
 	I915_FORMAT_MOD_Yf_TILED,
 	I915_FORMAT_MOD_Y_TILED,
@@ -2114,8 +2133,13 @@ struct intel_plane *
 		plane->update_slave = icl_update_slave;
 
 	if (skl_plane_has_planar(dev_priv, pipe, plane_id)) {
-		formats = skl_planar_formats;
-		num_formats = ARRAY_SIZE(skl_planar_formats);
+		if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) {
+			formats = glk_planar_formats;
+			num_formats = ARRAY_SIZE(glk_planar_formats);
+		} else {
+			formats = skl_planar_formats;
+			num_formats = ARRAY_SIZE(skl_planar_formats);
+		}
 	} else {
 		formats = skl_plane_formats;
 		num_formats = ARRAY_SIZE(skl_plane_formats);
-- 
1.9.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2019-03-01  8:19 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-01  8:16 [PATCH 0/6] Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats swati2.sharma
2019-03-01  8:16 ` swati2.sharma
2019-03-01  8:16 ` [PATCH 1/6] drm/i915: Add P010, P012, P016 plane control definitions swati2.sharma
2019-03-01  8:16   ` swati2.sharma
2019-03-01  8:16 ` [PATCH 2/6] drm/i915: Preparations for enabling P010, P012, P016 formats swati2.sharma
2019-03-01  8:16 ` swati2.sharma [this message]
2019-03-01  8:16   ` [PATCH 3/6] drm/i915: Enable P010, P012, P016 formats for primary and sprite planes swati2.sharma
2019-03-01  8:16 ` [PATCH 4/6] drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc swati2.sharma
2019-03-01  8:16   ` swati2.sharma
2019-03-01  8:16 ` [PATCH 5/6] drm/i915/icl: Add Y2xx and Y4xx (xx:10/12/16) plane control definitions swati2.sharma
2019-03-01  8:16   ` swati2.sharma
2019-03-01  8:16 ` [PATCH 6/6] drm/i915/icl: Enabling Y2xx and Y4xx (xx:10/12/16) formats for universal planes swati2.sharma
2019-03-01  8:16   ` swati2.sharma
2019-03-01  8:26 ` ✗ Fi.CI.CHECKPATCH: warning for Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats (rev3) Patchwork
2019-03-01  8:30 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-03-01  8:55 ` ✓ Fi.CI.BAT: success " Patchwork
2019-03-01 11:01 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-03-04  8:20 ` ✗ Fi.CI.CHECKPATCH: warning for Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats (rev4) Patchwork
2019-03-04  8:24 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-03-04  8:42 ` ✓ Fi.CI.BAT: success " Patchwork
2019-03-04 11:48 ` ✓ Fi.CI.IGT: " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2019-03-04 11:56 [PATCH 0/6] Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats Swati Sharma
2019-03-04 11:56 ` [PATCH 3/6] drm/i915: Enable P010, P012, P016 formats for primary and sprite planes Swati Sharma
2019-02-13 13:25 [PATCH 0/6] Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats Swati Sharma
2019-02-13 13:25 ` [PATCH 3/6] drm/i915: Enable P010, P012, P016 formats for primary and sprite planes Swati Sharma
2019-02-13 13:25   ` Swati Sharma via dri-devel

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