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From: <yongqiang.niu@mediatek.com>
To: <ck.hu@mediatek.com>, <p.zabel@pengutronix.de>,
	<robh+dt@kernel.org>, <matthias.bgg@gmail.com>
Cc: <airlied@linux.ie>, <mark.rutland@arm.com>,
	<dri-devel@lists.freedesktop.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>, <Bibby.Hsieh@mediatek.com>,
	<yt.shen@mediatek.com>,
	Yongqiang Niu <yongqiang.niu@mediatek.com>
Subject: [RESEND PATCH v1 13/18] drm/mediatek: add ddp write register common api
Date: Thu, 14 Mar 2019 20:05:15 +0800	[thread overview]
Message-ID: <1552565120-24329-14-git-send-email-yongqiang.niu@mediatek.com> (raw)
In-Reply-To: <1552565120-24329-1-git-send-email-yongqiang.niu@mediatek.com>

From: Yongqiang Niu <yongqiang.niu@mediatek.com>

This patch add ddp write register common api

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 24 ++++++++++++++++++++++++
 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h |  9 +++++++++
 2 files changed, 33 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index a97e27b..1c0f9cc 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
@@ -84,6 +84,30 @@
 #define DITHER_ADD_LSHIFT_G(x)			(((x) & 0x7) << 4)
 #define DITHER_ADD_RSHIFT_G(x)			(((x) & 0x7) << 0)
 
+void mtk_ddp_write(unsigned int value, struct mtk_ddp_comp *comp,
+		   unsigned int offset)
+{
+	writel(value, comp->regs + offset);
+}
+
+void mtk_ddp_write_relaxed(unsigned int value,
+			   struct mtk_ddp_comp *comp,
+			   unsigned int offset)
+{
+	writel_relaxed(value, comp->regs + offset);
+}
+
+void mtk_ddp_write_mask(unsigned int value,
+			struct mtk_ddp_comp *comp,
+			unsigned int offset,
+			unsigned int mask)
+{
+	unsigned int tmp = readl(comp->regs + offset);
+
+	tmp = (tmp & ~mask) | (value & mask);
+	writel(tmp, comp->regs + offset);
+}
+
 void mtk_dither_set(struct mtk_ddp_comp *comp, unsigned int bpc,
 		    unsigned int CFG)
 {
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
index f2ab0b3..b908172 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
@@ -189,5 +189,14 @@ int mtk_ddp_comp_init(struct device *dev, struct device_node *comp_node,
 void mtk_ddp_comp_unregister(struct drm_device *drm, struct mtk_ddp_comp *comp);
 void mtk_dither_set(struct mtk_ddp_comp *comp, unsigned int bpc,
 		    unsigned int CFG);
+void mtk_ddp_write(unsigned int value, struct mtk_ddp_comp *comp,
+		   unsigned int offset);
+void mtk_ddp_write_relaxed(unsigned int value,
+			   struct mtk_ddp_comp *comp,
+			   unsigned int offset);
+void mtk_ddp_write_mask(unsigned int value,
+			struct mtk_ddp_comp *comp,
+			unsigned int offset,
+			unsigned int mask);
 
 #endif /* MTK_DRM_DDP_COMP_H */
-- 
1.8.1.1.dirty


WARNING: multiple messages have this Message-ID (diff)
From: <yongqiang.niu@mediatek.com>
To: ck.hu@mediatek.com, p.zabel@pengutronix.de, robh+dt@kernel.org,
	matthias.bgg@gmail.com
Cc: airlied@linux.ie, mark.rutland@arm.com,
	dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, Bibby.Hsieh@mediatek.com,
	yt.shen@mediatek.com, Yongqiang Niu <yongqiang.niu@mediatek.com>
Subject: [RESEND PATCH v1 13/18] drm/mediatek: add ddp write register common api
Date: Thu, 14 Mar 2019 20:05:15 +0800	[thread overview]
Message-ID: <1552565120-24329-14-git-send-email-yongqiang.niu@mediatek.com> (raw)
In-Reply-To: <1552565120-24329-1-git-send-email-yongqiang.niu@mediatek.com>

From: Yongqiang Niu <yongqiang.niu@mediatek.com>

This patch add ddp write register common api

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 24 ++++++++++++++++++++++++
 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h |  9 +++++++++
 2 files changed, 33 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index a97e27b..1c0f9cc 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
@@ -84,6 +84,30 @@
 #define DITHER_ADD_LSHIFT_G(x)			(((x) & 0x7) << 4)
 #define DITHER_ADD_RSHIFT_G(x)			(((x) & 0x7) << 0)
 
+void mtk_ddp_write(unsigned int value, struct mtk_ddp_comp *comp,
+		   unsigned int offset)
+{
+	writel(value, comp->regs + offset);
+}
+
+void mtk_ddp_write_relaxed(unsigned int value,
+			   struct mtk_ddp_comp *comp,
+			   unsigned int offset)
+{
+	writel_relaxed(value, comp->regs + offset);
+}
+
+void mtk_ddp_write_mask(unsigned int value,
+			struct mtk_ddp_comp *comp,
+			unsigned int offset,
+			unsigned int mask)
+{
+	unsigned int tmp = readl(comp->regs + offset);
+
+	tmp = (tmp & ~mask) | (value & mask);
+	writel(tmp, comp->regs + offset);
+}
+
 void mtk_dither_set(struct mtk_ddp_comp *comp, unsigned int bpc,
 		    unsigned int CFG)
 {
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
index f2ab0b3..b908172 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
@@ -189,5 +189,14 @@ int mtk_ddp_comp_init(struct device *dev, struct device_node *comp_node,
 void mtk_ddp_comp_unregister(struct drm_device *drm, struct mtk_ddp_comp *comp);
 void mtk_dither_set(struct mtk_ddp_comp *comp, unsigned int bpc,
 		    unsigned int CFG);
+void mtk_ddp_write(unsigned int value, struct mtk_ddp_comp *comp,
+		   unsigned int offset);
+void mtk_ddp_write_relaxed(unsigned int value,
+			   struct mtk_ddp_comp *comp,
+			   unsigned int offset);
+void mtk_ddp_write_mask(unsigned int value,
+			struct mtk_ddp_comp *comp,
+			unsigned int offset,
+			unsigned int mask);
 
 #endif /* MTK_DRM_DDP_COMP_H */
-- 
1.8.1.1.dirty

WARNING: multiple messages have this Message-ID (diff)
From: <yongqiang.niu@mediatek.com>
To: <ck.hu@mediatek.com>, <p.zabel@pengutronix.de>,
	<robh+dt@kernel.org>, <matthias.bgg@gmail.com>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
	Yongqiang Niu <yongqiang.niu@mediatek.com>,
	airlied@linux.ie, linux-kernel@vger.kernel.org,
	dri-devel@lists.freedesktop.org,
	linux-mediatek@lists.infradead.org, Bibby.Hsieh@mediatek.com,
	yt.shen@mediatek.com, linux-arm-kernel@lists.infradead.org
Subject: [RESEND PATCH v1 13/18] drm/mediatek: add ddp write register common api
Date: Thu, 14 Mar 2019 20:05:15 +0800	[thread overview]
Message-ID: <1552565120-24329-14-git-send-email-yongqiang.niu@mediatek.com> (raw)
In-Reply-To: <1552565120-24329-1-git-send-email-yongqiang.niu@mediatek.com>

From: Yongqiang Niu <yongqiang.niu@mediatek.com>

This patch add ddp write register common api

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 24 ++++++++++++++++++++++++
 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h |  9 +++++++++
 2 files changed, 33 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index a97e27b..1c0f9cc 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
@@ -84,6 +84,30 @@
 #define DITHER_ADD_LSHIFT_G(x)			(((x) & 0x7) << 4)
 #define DITHER_ADD_RSHIFT_G(x)			(((x) & 0x7) << 0)
 
+void mtk_ddp_write(unsigned int value, struct mtk_ddp_comp *comp,
+		   unsigned int offset)
+{
+	writel(value, comp->regs + offset);
+}
+
+void mtk_ddp_write_relaxed(unsigned int value,
+			   struct mtk_ddp_comp *comp,
+			   unsigned int offset)
+{
+	writel_relaxed(value, comp->regs + offset);
+}
+
+void mtk_ddp_write_mask(unsigned int value,
+			struct mtk_ddp_comp *comp,
+			unsigned int offset,
+			unsigned int mask)
+{
+	unsigned int tmp = readl(comp->regs + offset);
+
+	tmp = (tmp & ~mask) | (value & mask);
+	writel(tmp, comp->regs + offset);
+}
+
 void mtk_dither_set(struct mtk_ddp_comp *comp, unsigned int bpc,
 		    unsigned int CFG)
 {
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
index f2ab0b3..b908172 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
@@ -189,5 +189,14 @@ int mtk_ddp_comp_init(struct device *dev, struct device_node *comp_node,
 void mtk_ddp_comp_unregister(struct drm_device *drm, struct mtk_ddp_comp *comp);
 void mtk_dither_set(struct mtk_ddp_comp *comp, unsigned int bpc,
 		    unsigned int CFG);
+void mtk_ddp_write(unsigned int value, struct mtk_ddp_comp *comp,
+		   unsigned int offset);
+void mtk_ddp_write_relaxed(unsigned int value,
+			   struct mtk_ddp_comp *comp,
+			   unsigned int offset);
+void mtk_ddp_write_mask(unsigned int value,
+			struct mtk_ddp_comp *comp,
+			unsigned int offset,
+			unsigned int mask);
 
 #endif /* MTK_DRM_DDP_COMP_H */
-- 
1.8.1.1.dirty


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2019-03-14 12:45 UTC|newest]

Thread overview: 68+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-14 12:05 [RESEND PATCH v1 00/18] add drm support for MT8183 yongqiang.niu
2019-03-14 12:05 ` yongqiang.niu
2019-03-14 12:05 ` yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 01/18] drm/mediatek: update dt-bindings for mt8183 yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 02/18] drm/mediatek: add mutex mod and sof into ddp private data yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 03/18] drm/mediatek: redefine mtk_ddp_sout_sel yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 04/18] drm/mediatek: move rdma sout from mtk_ddp_mout_en into mtk_ddp_sout_sel yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 05/18] drm/mediatek: add ddp component CCORR yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 06/18] drm/mediatek: add mmsys private data for ddp path config yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 07/18] drm/mediatek: add commponent OVL0_2L yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 08/18] drm/mediatek: add component OVL1_2L yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 09/18] drm/mediatek: add component DITHER yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 10/18] drm/mediatek: add gmc_bits for ovl private data yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 11/18] drm/medaitek: add layer_nr " yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 12/18] drm/mediatek: add function to connect module with it's previous one yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05 ` yongqiang.niu [this message]
2019-03-14 12:05   ` [RESEND PATCH v1 13/18] drm/mediatek: add ddp write register common api yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 14/18] drm/mediatek: add connect function for ovl yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 15/18] drm/mediatek: add RDMA1 fifo size into RDMA private data yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 16/18] drm/mediatek: add function mtk_ddp_comp_get_type yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 17/18] drm/mediatek: add ovl0/ovl0_2l usecase yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 18/18] drm/mediatek: add support for mediatek SOC MT8183 yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 12:05   ` yongqiang.niu
2019-03-14 17:35 ` [RESEND PATCH v1 00/18] add drm support for MT8183 Matthias Brugger
2019-03-14 17:35   ` Matthias Brugger
2019-03-14 17:35   ` Matthias Brugger
2019-03-15  1:37   ` Yongqiang Niu
2019-03-15  1:37     ` Yongqiang Niu
2019-03-15  1:37     ` Yongqiang Niu
  -- strict thread matches above, loose matches on Subject: below --
2019-03-14  8:05 [RESEND PATCH v1, " Yongqiang Niu
2019-03-14  8:05 ` [RESEND PATCH v1, 13/18] drm/mediatek: add ddp write register common api Yongqiang Niu
2019-03-13 12:00 [RESEND PATCH v1, 00/18] add drm support for MT8183 Yongqiang Niu
2019-03-13 12:00 ` [RESEND PATCH v1, 13/18] drm/mediatek: add ddp write register common api Yongqiang Niu
2019-03-13  9:24 [RESEND PATCH v1, 00/18] add drm support for MT8183 Yongqiang Niu
2019-03-13  9:25 ` [RESEND PATCH v1, 13/18] drm/mediatek: add ddp write register common api Yongqiang Niu
2019-03-13  9:11 [RESEND PATCH v1, 00/18] add drm support for MT8183 Yongqiang Niu
2019-03-13  9:12 ` [RESEND PATCH v1, 13/18] drm/mediatek: add ddp write register common api Yongqiang Niu
2019-03-13  8:25 [RESEND PATCH v1, 00/18] add drm support for MT8183 Yongqiang Niu
2019-03-13  8:25 ` [RESEND PATCH v1, 13/18] drm/mediatek: add ddp write register common api Yongqiang Niu

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