All of lore.kernel.org
 help / color / mirror / Atom feed
From: biju.das@bp.renesas.com (Biju Das)
To: cip-dev@lists.cip-project.org
Subject: [cip-dev] [PATCH 11/18] dt-bindings: power: Add r8a774c0 SYSC power domain definitions
Date: Thu, 21 Mar 2019 14:24:09 +0000	[thread overview]
Message-ID: <1553178256-6293-12-git-send-email-biju.das@bp.renesas.com> (raw)
In-Reply-To: <1553178256-6293-1-git-send-email-biju.das@bp.renesas.com>

From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>

This patch adds power domain indices for RZ/G2E.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit cb391265bca42f17c59d90e842a6bc582e3e2211)
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
 include/dt-bindings/power/r8a774c0-sysc.h | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)
 create mode 100644 include/dt-bindings/power/r8a774c0-sysc.h

diff --git a/include/dt-bindings/power/r8a774c0-sysc.h b/include/dt-bindings/power/r8a774c0-sysc.h
new file mode 100644
index 0000000..9922d4c
--- /dev/null
+++ b/include/dt-bindings/power/r8a774c0-sysc.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+#ifndef __DT_BINDINGS_POWER_R8A774C0_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A774C0_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A774C0_PD_CA53_CPU0		5
+#define R8A774C0_PD_CA53_CPU1		6
+#define R8A774C0_PD_A3VC		14
+#define R8A774C0_PD_3DG_A		17
+#define R8A774C0_PD_3DG_B		18
+#define R8A774C0_PD_CA53_SCU		21
+#define R8A774C0_PD_A2VC1		26
+
+/* Always-on power area */
+#define R8A774C0_PD_ALWAYS_ON		32
+
+#endif /* __DT_BINDINGS_POWER_R8A774C0_SYSC_H__ */
-- 
2.7.4

  parent reply	other threads:[~2019-03-21 14:24 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-21 14:23 [cip-dev] [PATCH 00/18] Add RZ/G2[ME] SoC Identification/SYSC/RST support Biju Das
2019-03-21 14:23 ` [cip-dev] [PATCH 01/18] dt-bindings: arm: Document RZ/G2M SoC DT bindings Biju Das
2019-03-21 14:24 ` [cip-dev] [PATCH 02/18] dt-bindings: arm: Document RZ/G2E " Biju Das
2019-03-21 14:24 ` [cip-dev] [PATCH 03/18] dt-bindings: arm: Fix RZ/G2E part number Biju Das
2019-03-21 14:24 ` [cip-dev] [PATCH 04/18] soc: renesas: Identify RZ/G2M Biju Das
2019-03-21 14:24 ` [cip-dev] [PATCH 05/18] soc: renesas: Identify RZ/G2E Biju Das
2019-03-21 14:24 ` [cip-dev] [PATCH 06/18] arm64: Add Renesas R8A774A1 support Biju Das
2019-03-21 14:24 ` [cip-dev] [PATCH 07/18] arm64: Add Renesas R8A774C0 support Biju Das
2019-03-21 14:24 ` [cip-dev] [PATCH 08/18] arm64: defconfig: enable R8A774A1 SoC Biju Das
2019-03-21 14:24 ` [cip-dev] [PATCH 09/18] arm64: defconfig: enable R8A774C0 SoC Biju Das
2019-03-21 14:24 ` [cip-dev] [PATCH 10/18] dt-bindings: power: Add r8a774a1 SYSC power domain definitions Biju Das
2019-03-21 14:24 ` Biju Das [this message]
2019-03-21 14:24 ` [cip-dev] [PATCH 12/18] soc: renesas: rcar-sysc: Add r8a774a1 support Biju Das
2019-03-21 14:24 ` [cip-dev] [PATCH 13/18] dt-bindings: power: rcar-sysc: Document r8a774c0 sysc Biju Das
2019-03-21 14:24 ` [cip-dev] [PATCH 14/18] soc: renesas: rcar-sysc: Add r8a774c0 support Biju Das
2019-03-21 14:24 ` [cip-dev] [PATCH 15/18] soc: renesas: r8a774c0-sysc: Fix initialization order of 3DG-{A, B} Biju Das
2019-04-09 19:49   ` Pavel Machek
2019-03-21 14:24 ` [cip-dev] [PATCH 16/18] soc: renesas: rcar-rst: Add support for RZ/G2M Biju Das
2019-03-21 14:24 ` [cip-dev] [PATCH 17/18] dt-bindings: reset: rcar-rst: Document r8a774c0 rst Biju Das
2019-03-21 14:24 ` [cip-dev] [PATCH 18/18] soc: renesas: rcar-rst: Add support for RZ/G2E Biju Das

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1553178256-6293-12-git-send-email-biju.das@bp.renesas.com \
    --to=biju.das@bp.renesas.com \
    --cc=cip-dev@lists.cip-project.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.