All of lore.kernel.org
 help / color / mirror / Atom feed
From: biju.das@bp.renesas.com (Biju Das)
To: cip-dev@lists.cip-project.org
Subject: [cip-dev] [PATCH 4/9] clk: renesas: cpg-mssr: Add support for fixed rate clocks
Date: Thu, 21 Mar 2019 15:12:03 +0000	[thread overview]
Message-ID: <1553181128-8171-5-git-send-email-biju.das@bp.renesas.com> (raw)
In-Reply-To: <1553181128-8171-1-git-send-email-biju.das@bp.renesas.com>

From: Geert Uytterhoeven <geert+renesas@glider.be>

Add support for defining fixed rate clocks, to be used for on-chip
oscillators.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 0d2602d750152f9fcf3d9af9466f3d67b60aa646)
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
 drivers/clk/renesas/renesas-cpg-mssr.c | 5 +++++
 drivers/clk/renesas/renesas-cpg-mssr.h | 3 +++
 2 files changed, 8 insertions(+)

diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c
index f4b013e..e043389 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.c
+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
@@ -313,6 +313,11 @@ static void __init cpg_mssr_register_core_clk(const struct cpg_core_clk *core,
 		}
 		break;
 
+	case CLK_TYPE_FR:
+		clk = clk_register_fixed_rate(NULL, core->name, NULL, 0,
+					      core->mult);
+		break;
+
 	default:
 		if (info->cpg_clk_register)
 			clk = info->cpg_clk_register(dev, core, info,
diff --git a/drivers/clk/renesas/renesas-cpg-mssr.h b/drivers/clk/renesas/renesas-cpg-mssr.h
index 642f720..87bb8f3 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.h
+++ b/drivers/clk/renesas/renesas-cpg-mssr.h
@@ -38,6 +38,7 @@ enum clk_types {
 	CLK_TYPE_FF,		/* Fixed Factor Clock */
 	CLK_TYPE_DIV6P1,	/* DIV6 Clock with 1 parent clock */
 	CLK_TYPE_DIV6_RO,	/* DIV6 Clock read only with extra divisor */
+	CLK_TYPE_FR,		/* Fixed Rate Clock */
 
 	/* Custom definitions start here */
 	CLK_TYPE_CUSTOM,
@@ -56,6 +57,8 @@ enum clk_types {
 	DEF_BASE(_name, _id, CLK_TYPE_DIV6P1, _parent, .offset = _offset)
 #define DEF_DIV6_RO(_name, _id, _parent, _offset, _div)	\
 	DEF_BASE(_name, _id, CLK_TYPE_DIV6_RO, _parent, .offset = _offset, .div = _div, .mult = 1)
+#define DEF_RATE(_name, _id, _rate)	\
+	DEF_TYPE(_name, _id, CLK_TYPE_FR, .mult = _rate)
 
     /*
      * Definitions of Module Clocks
-- 
2.7.4

  parent reply	other threads:[~2019-03-21 15:12 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-21 15:11 [cip-dev] [PATCH 0/9] Add RZ/G2[ME] Clock support Biju Das
2019-03-21 15:12 ` [cip-dev] [PATCH 1/9] clk: renesas: Add r8a774c0 CPG Core Clock Definitions Biju Das
2019-04-10 22:36   ` nobuhiro1.iwamatsu at toshiba.co.jp
2019-03-21 15:12 ` [cip-dev] [PATCH 2/9] clk: renesas: Add r8a774a1 " Biju Das
2019-03-21 15:12 ` [cip-dev] [PATCH 3/9] clk: renesas: rcar-gen3: Add support for OSC EXTAL predivider Biju Das
2019-03-21 15:12 ` Biju Das [this message]
2019-03-21 15:12 ` [cip-dev] [PATCH 5/9] clk: renesas: rcar-gen3: Add support for RCKSEL clock selection Biju Das
2019-03-21 15:12 ` [cip-dev] [PATCH 6/9] clk: renesas: rcar-gen3: Add support for mode pin " Biju Das
2019-03-21 15:12 ` [cip-dev] [PATCH 7/9] clk: renesas: cpg-mssr: Add r8a774a1 support Biju Das
2019-03-21 15:12 ` [cip-dev] [PATCH 8/9] dt-bindings: clock: renesas: cpg-mssr: Document r8a774c0 Biju Das
2019-03-21 15:12 ` [cip-dev] [PATCH 9/9] clk: renesas: cpg-mssr: Add r8a774c0 support Biju Das

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1553181128-8171-5-git-send-email-biju.das@bp.renesas.com \
    --to=biju.das@bp.renesas.com \
    --cc=cip-dev@lists.cip-project.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.