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From: biju.das@bp.renesas.com (Biju Das)
To: cip-dev@lists.cip-project.org
Subject: [cip-dev] [PATCH 11/11] arm64: dts: renesas: r8a774c0-cat874: Add uSD support
Date: Fri, 22 Mar 2019 09:40:10 +0000	[thread overview]
Message-ID: <1553247610-33056-12-git-send-email-biju.das@bp.renesas.com> (raw)
In-Reply-To: <1553247610-33056-1-git-send-email-biju.das@bp.renesas.com>

This patch adds uSD card support.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit a102b93eafef0994f1a96e9683d1e3d692a6bb48)
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts | 50 +++++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts
index c545ce5..477a56b 100644
--- a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts
+++ b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts
@@ -7,6 +7,7 @@
 
 /dts-v1/;
 #include "r8a774c0.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 
 / {
 	model = "Silicon Linux RZ/G2E 96board platform (CAT874)";
@@ -26,6 +27,29 @@
 		/* first 128MB is reserved for secure area. */
 		reg = <0x0 0x48000000 0x0 0x78000000>;
 	};
+
+	vcc_sdhi0: regulator-vcc-sdhi0 {
+		compatible = "regulator-fixed";
+
+		regulator-name = "SDHI0 Vcc";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	vccq_sdhi0: regulator-vccq-sdhi0 {
+		compatible = "regulator-gpio";
+
+		regulator-name = "SDHI0 VccQ";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <3300000>;
+
+		gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
+		gpios-states = <1>;
+		states = <3300000 1
+			  1800000 0>;
+	};
 };
 
 &extal_clk {
@@ -37,6 +61,18 @@
 		groups = "scif2_data_a";
 		function = "scif2";
 	};
+
+	sdhi0_pins: sd0 {
+		groups = "sdhi0_data4", "sdhi0_ctrl";
+		function = "sdhi0";
+		power-source = <3300>;
+	};
+
+	sdhi0_pins_uhs: sd0_uhs {
+		groups = "sdhi0_data4", "sdhi0_ctrl";
+		function = "sdhi0";
+		power-source = <1800>;
+	};
 };
 
 &scif2 {
@@ -45,3 +81,17 @@
 
 	status = "okay";
 };
+
+&sdhi0 {
+	pinctrl-0 = <&sdhi0_pins>;
+	pinctrl-1 = <&sdhi0_pins_uhs>;
+	pinctrl-names = "default", "state_uhs";
+
+	vmmc-supply = <&vcc_sdhi0>;
+	vqmmc-supply = <&vccq_sdhi0>;
+	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
+	bus-width = <4>;
+	sd-uhs-sdr50;
+	sd-uhs-sdr104;
+	status = "okay";
+};
-- 
2.7.4

      parent reply	other threads:[~2019-03-22  9:40 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-22  9:39 [cip-dev] [PATCH 00/11] Add SDHI support Biju Das
2019-03-22  9:40 ` [cip-dev] [PATCH 01/11] pinctrl: sh-pfc: r8a77990: Add Audio clock pins, groups and functions Biju Das
2019-04-09 20:56   ` Pavel Machek
2019-04-11 10:26   ` Pavel Machek
2019-03-22  9:40 ` [cip-dev] [PATCH 02/11] pinctrl: sh-pfc: r8a77990: Add Audio SSI " Biju Das
2019-03-22  9:40 ` [cip-dev] [PATCH 03/11] pinctrl: sh-pfc: r8a77990: Add SDHI " Biju Das
2019-03-22  9:40 ` [cip-dev] [PATCH 04/11] pinctrl: sh-pfc: r8a77990: Add voltage switch operations for SDHI Biju Das
2019-03-22  9:40 ` [cip-dev] [PATCH 05/11] mmc: renesas_sdhi: Add r8a774a1 support Biju Das
2019-03-22  9:40 ` [cip-dev] [PATCH 06/11] mmc: renesas_sdhi_internal_dmac: Whitelist r8a774a1 Biju Das
2019-03-22  9:40 ` [cip-dev] [PATCH 07/11] dt-bindings: mmc: renesas_sdhi: Add r8a77470 support Biju Das
2019-03-22  9:40 ` [cip-dev] [PATCH 08/11] dt-bindings: mmc: renesas_sdhi: Add r8a774c0 support Biju Das
2019-03-22  9:40 ` [cip-dev] [PATCH 09/11] mmc: renesas_sdhi_internal_dmac: Whitelist r8a774c0 Biju Das
2019-03-22  9:40 ` [cip-dev] [PATCH 10/11] arm64: dts: renesas: r8a774c0: Add SDHI nodes Biju Das
2019-03-22  9:40 ` Biju Das [this message]

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