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From: fabrizio.castro@bp.renesas.com (Fabrizio Castro)
To: cip-dev@lists.cip-project.org
Subject: [cip-dev] [PATCH 4.19y 01/10] pinctrl: sh-pfc: r8a77990: Add CAN pins, groups and functions
Date: Mon,  1 Apr 2019 14:55:38 +0100	[thread overview]
Message-ID: <1554126947-32747-2-git-send-email-fabrizio.castro@bp.renesas.com> (raw)
In-Reply-To: <1554126947-32747-1-git-send-email-fabrizio.castro@bp.renesas.com>

From: Takeshi Kihara <takeshi.kihara.df@renesas.com>

commit c1e5bd286fe501992165608551f889ec69f5901a upstream.

This patch adds CAN{0,1} pins, groups and functions to the R8A77990 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
---
 drivers/pinctrl/sh-pfc/pfc-r8a77990.c | 51 +++++++++++++++++++++++++++++++++--
 1 file changed, 49 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
index 6868753..2869a02 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
@@ -1538,6 +1538,35 @@ static const unsigned int avb_avtp_capture_a_mux[] = {
 	AVB_AVTP_CAPTURE_A_MARK,
 };
 
+/* - CAN ------------------------------------------------------------------ */
+static const unsigned int can0_data_pins[] = {
+	/* TX, RX */
+	RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13),
+};
+
+static const unsigned int can0_data_mux[] = {
+	CAN0_TX_MARK, CAN0_RX_MARK,
+};
+
+static const unsigned int can1_data_pins[] = {
+	/* TX, RX */
+	RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 7),
+};
+
+static const unsigned int can1_data_mux[] = {
+	CAN1_TX_MARK, CAN1_RX_MARK,
+};
+
+/* - CAN Clock -------------------------------------------------------------- */
+static const unsigned int can_clk_pins[] = {
+	/* CLK */
+	RCAR_GP_PIN(0, 14),
+};
+
+static const unsigned int can_clk_mux[] = {
+	CAN_CLK_MARK,
+};
+
 /* - DU --------------------------------------------------------------------- */
 static const unsigned int du_rgb666_pins[] = {
 	/* R[7:2], G[7:2], B[7:2] */
@@ -3475,7 +3504,7 @@ static const unsigned int vin5_clk_b_mux[] = {
 };
 
 static const struct {
-	struct sh_pfc_pin_group common[238];
+	struct sh_pfc_pin_group common[241];
 	struct sh_pfc_pin_group automotive[0];
 } pinmux_groups = {
 	.common = {
@@ -3504,6 +3533,9 @@ static const struct {
 		SH_PFC_PIN_GROUP(avb_avtp_pps),
 		SH_PFC_PIN_GROUP(avb_avtp_match_a),
 		SH_PFC_PIN_GROUP(avb_avtp_capture_a),
+		SH_PFC_PIN_GROUP(can0_data),
+		SH_PFC_PIN_GROUP(can1_data),
+		SH_PFC_PIN_GROUP(can_clk),
 		SH_PFC_PIN_GROUP(du_rgb666),
 		SH_PFC_PIN_GROUP(du_rgb888),
 		SH_PFC_PIN_GROUP(du_clk_in_0),
@@ -3751,6 +3783,18 @@ static const char * const avb_groups[] = {
 	"avb_avtp_capture_a",
 };
 
+static const char * const can0_groups[] = {
+	"can0_data",
+};
+
+static const char * const can1_groups[] = {
+	"can1_data",
+};
+
+static const char * const can_clk_groups[] = {
+	"can_clk",
+};
+
 static const char * const du_groups[] = {
 	"du_rgb666",
 	"du_rgb888",
@@ -4082,12 +4126,15 @@ static const char * const vin5_groups[] = {
 };
 
 static const struct {
-	struct sh_pfc_function common[41];
+	struct sh_pfc_function common[44];
 	struct sh_pfc_function automotive[0];
 } pinmux_functions = {
 	.common = {
 		SH_PFC_FUNCTION(audio_clk),
 		SH_PFC_FUNCTION(avb),
+		SH_PFC_FUNCTION(can0),
+		SH_PFC_FUNCTION(can1),
+		SH_PFC_FUNCTION(can_clk),
 		SH_PFC_FUNCTION(du),
 		SH_PFC_FUNCTION(hscif0),
 		SH_PFC_FUNCTION(hscif1),
-- 
2.7.4

  reply	other threads:[~2019-04-01 13:55 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-01 13:55 [cip-dev] [PATCH 4.19y 00/10] Pinctrl driver updates for RZ/G2E Fabrizio Castro
2019-04-01 13:55 ` Fabrizio Castro [this message]
2019-04-09 21:03   ` [cip-dev] [PATCH 4.19y 01/10] pinctrl: sh-pfc: r8a77990: Add CAN pins, groups and functions Pavel Machek
2019-04-10  9:16     ` Fabrizio Castro
2019-04-10  9:28       ` Fabrizio Castro
2019-04-12 20:28         ` [cip-dev] Renesas patches was " Pavel Machek
2019-04-15  8:10           ` Fabrizio Castro
2019-04-10 23:31       ` [cip-dev] " nobuhiro1.iwamatsu at toshiba.co.jp
2019-04-12  8:04   ` Pavel Machek
2019-04-01 13:55 ` [cip-dev] [PATCH 4.19y 02/10] pinctrl: sh-pfc: r8a77990: Add CAN FD " Fabrizio Castro
2019-04-01 13:55 ` [cip-dev] [PATCH 4.19y 03/10] pinctrl: sh-pfc: r8a77990: Fix IOCTRL reg state after s2ram on R-Car E3 Fabrizio Castro
2019-04-01 13:55 ` [cip-dev] [PATCH 4.19y 04/10] pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 SEL_I2C1 field width Fabrizio Castro
2019-04-01 13:55 ` [cip-dev] [PATCH 4.19y 05/10] pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit3 when using TX0 Fabrizio Castro
2019-04-01 13:55 ` [cip-dev] [PATCH 4.19y 06/10] pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit2 when using RX2, TX2 and SCK2 Fabrizio Castro
2019-04-01 13:55 ` [cip-dev] [PATCH 4.19y 07/10] pinctrl: sh-pfc: r8a77990: Fix MOD_SEL bit numbering Fabrizio Castro
2019-04-01 13:55 ` [cip-dev] [PATCH 4.19y 08/10] pinctrl: sh-pfc: r8a77990: GP6_9 does not have pull-down capability Fabrizio Castro
2019-04-01 13:55 ` [cip-dev] [PATCH 4.19y 09/10] pinctrl: sh-pfc: r8a77990: Add TMU pins, groups and functions Fabrizio Castro
2019-04-01 13:55 ` [cip-dev] [PATCH 4.19y 10/10] pinctrl: sh-pfc: r8a77990: Add DRIF " Fabrizio Castro

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