From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: thierry.reding@gmail.com, jonathanh@nvidia.com, talho@nvidia.com,
skomatineni@nvidia.com, broonie@kernel.org, robh+dt@kernel.org,
mark.rutland@arm.com, kyarlagadda@nvidia.com
Cc: ldewangan@nvidia.com, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
devicetree@vger.kernel.org
Subject: [PATCH V2 06/20] spi: tegra114: set supported bits per word
Date: Thu, 4 Apr 2019 17:14:05 -0700 [thread overview]
Message-ID: <1554423259-26056-6-git-send-email-skomatineni@nvidia.com> (raw)
In-Reply-To: <1554423259-26056-1-git-send-email-skomatineni@nvidia.com>
Tegra SPI supports 4 through 32 bits per word.
This patch sets bits_per_word_mask accordingly to support transfer
with these bits per word.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
drivers/spi/spi-tegra114.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index e0f20fad5df2..191233eae149 100644
--- a/drivers/spi/spi-tegra114.c
+++ b/drivers/spi/spi-tegra114.c
@@ -1153,6 +1153,7 @@ static int tegra_spi_probe(struct platform_device *pdev)
/* the spi->mode bits understood by this driver: */
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST;
+ master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
master->setup = tegra_spi_setup;
master->transfer_one_message = tegra_spi_transfer_one_message;
master->num_chipselect = MAX_CHIP_SELECT;
--
2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: <thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
<talho@nvidia.com>, <skomatineni@nvidia.com>,
<broonie@kernel.org>, <robh+dt@kernel.org>,
<mark.rutland@arm.com>, <kyarlagadda@nvidia.com>
Cc: <ldewangan@nvidia.com>, <linux-tegra@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>,
<devicetree@vger.kernel.org>
Subject: [PATCH V2 06/20] spi: tegra114: set supported bits per word
Date: Thu, 4 Apr 2019 17:14:05 -0700 [thread overview]
Message-ID: <1554423259-26056-6-git-send-email-skomatineni@nvidia.com> (raw)
In-Reply-To: <1554423259-26056-1-git-send-email-skomatineni@nvidia.com>
Tegra SPI supports 4 through 32 bits per word.
This patch sets bits_per_word_mask accordingly to support transfer
with these bits per word.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
drivers/spi/spi-tegra114.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index e0f20fad5df2..191233eae149 100644
--- a/drivers/spi/spi-tegra114.c
+++ b/drivers/spi/spi-tegra114.c
@@ -1153,6 +1153,7 @@ static int tegra_spi_probe(struct platform_device *pdev)
/* the spi->mode bits understood by this driver: */
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST;
+ master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
master->setup = tegra_spi_setup;
master->transfer_one_message = tegra_spi_transfer_one_message;
master->num_chipselect = MAX_CHIP_SELECT;
--
2.7.4
next prev parent reply other threads:[~2019-04-05 0:14 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-05 0:14 [PATCH V2 01/20] spi: tegra114: fix PIO transfer Sowjanya Komatineni
2019-04-05 0:14 ` Sowjanya Komatineni
2019-04-05 0:14 ` [PATCH V2 02/20] spi: tegra114: use unpacked mode for below 4 bytes Sowjanya Komatineni
2019-04-05 0:14 ` Sowjanya Komatineni
2019-04-05 0:14 ` [PATCH V2 03/20] spi: tegra114: de-assert CS before SPI mode change Sowjanya Komatineni
2019-04-05 0:14 ` Sowjanya Komatineni
2019-04-05 3:27 ` Applied "spi: tegra114: de-assert CS before SPI mode change" to the spi tree Mark Brown
2019-04-05 3:27 ` Mark Brown
2019-04-05 3:27 ` Mark Brown
2019-04-05 3:27 ` Mark Brown
2019-04-05 0:14 ` [PATCH V2 04/20] spi: tegra114: avoid reset call in atomic context Sowjanya Komatineni
2019-04-05 0:14 ` Sowjanya Komatineni
2019-04-05 3:26 ` Applied "spi: tegra114: avoid reset call in atomic context" to the spi tree Mark Brown
2019-04-05 3:26 ` Mark Brown
2019-04-05 3:26 ` Mark Brown
2019-04-05 3:26 ` Mark Brown
2019-04-05 0:14 ` [PATCH V2 05/20] spi: tegra114: dump SPI registers during timeout Sowjanya Komatineni
2019-04-05 0:14 ` Sowjanya Komatineni
2019-04-05 3:26 ` Applied "spi: tegra114: dump SPI registers during timeout" to the spi tree Mark Brown
2019-04-05 3:26 ` Mark Brown
2019-04-05 3:26 ` Mark Brown
2019-04-05 3:26 ` Mark Brown
2019-04-05 0:14 ` Sowjanya Komatineni [this message]
2019-04-05 0:14 ` [PATCH V2 06/20] spi: tegra114: set supported bits per word Sowjanya Komatineni
2019-04-05 3:26 ` Applied "spi: tegra114: set supported bits per word" to the spi tree Mark Brown
2019-04-05 3:26 ` Mark Brown
2019-04-05 3:26 ` Mark Brown
2019-04-05 3:26 ` Mark Brown
2019-04-05 0:14 ` [PATCH V2 07/20] spi: tegra114: set bus number based on id Sowjanya Komatineni
2019-04-05 0:14 ` Sowjanya Komatineni
2019-04-05 0:14 ` [PATCH V2 08/20] spi: tegra114: add dual mode support Sowjanya Komatineni
2019-04-05 0:14 ` Sowjanya Komatineni
2019-04-08 7:32 ` Applied "spi: tegra114: add dual mode support" to the spi tree Mark Brown
2019-04-08 7:32 ` Mark Brown
2019-04-08 7:32 ` Mark Brown
2019-04-08 7:32 ` Mark Brown
2019-04-05 0:14 ` [PATCH V2 09/20] spi: tegra114: add 3 wire transfer mode support Sowjanya Komatineni
2019-04-05 0:14 ` Sowjanya Komatineni
2019-04-08 7:31 ` Applied "spi: tegra114: add 3 wire transfer mode support" to the spi tree Mark Brown
2019-04-08 7:31 ` Mark Brown
2019-04-08 7:31 ` Mark Brown
2019-04-08 7:31 ` Mark Brown
2019-04-05 0:14 ` [PATCH V2 10/20] Documentation: devicetree: spi: add spi-lsbyte-first propery Sowjanya Komatineni
2019-04-05 0:14 ` Sowjanya Komatineni
2019-04-08 6:27 ` Mark Brown
2019-04-05 0:14 ` [PATCH V2 11/20] spi: expand mode support and add LSBYTE_FIRST mode Sowjanya Komatineni
2019-04-05 0:14 ` Sowjanya Komatineni
2019-04-08 6:28 ` Mark Brown
2019-04-11 19:58 ` Sowjanya Komatineni
2019-04-12 8:32 ` Mark Brown
2019-04-05 0:14 ` [PATCH V2 12/20] spi: tegra114: add support for LSBYTE_FIRST Sowjanya Komatineni
2019-04-05 0:14 ` Sowjanya Komatineni
2019-04-05 0:14 ` [PATCH V2 13/20] spi: tegra114: add support for interrupt mask Sowjanya Komatineni
2019-04-05 0:14 ` Sowjanya Komatineni
2019-04-05 0:14 ` [PATCH V2 14/20] spi: tegra114: add support for gpio based cs Sowjanya Komatineni
2019-04-05 0:14 ` Sowjanya Komatineni
2019-04-08 6:30 ` Mark Brown
2019-04-05 0:14 ` [PATCH V2 15/20] spi: tegra114: add support for hw " Sowjanya Komatineni
2019-04-05 0:14 ` Sowjanya Komatineni
2019-04-05 0:14 ` [PATCH V2 16/20] spi-summary: document set_cs_timing Sowjanya Komatineni
2019-04-05 0:14 ` Sowjanya Komatineni
2019-04-08 7:31 ` Applied "spi-summary: document set_cs_timing" to the spi tree Mark Brown
2019-04-08 7:31 ` Mark Brown
2019-04-08 7:31 ` Mark Brown
2019-04-08 7:31 ` Mark Brown
2019-04-05 0:14 ` [PATCH V2 17/20] spi: add a method for configuring CS timing Sowjanya Komatineni
2019-04-05 0:14 ` Sowjanya Komatineni
2019-04-08 7:31 ` Applied "spi: add a method for configuring CS timing" to the spi tree Mark Brown
2019-04-08 7:31 ` Mark Brown
2019-04-08 7:31 ` Mark Brown
2019-04-08 7:31 ` Mark Brown
2019-04-05 0:14 ` [PATCH V2 18/20] spi: tegra114: add support for HW CS timing Sowjanya Komatineni
2019-04-05 0:14 ` Sowjanya Komatineni
2019-04-05 0:14 ` [PATCH V2 19/20] DT bindings: spi: document tx/rx clock delay properties Sowjanya Komatineni
2019-04-05 0:14 ` Sowjanya Komatineni
2019-04-08 7:22 ` Mark Brown
2019-04-08 7:31 ` Applied "spi: document tx/rx clock delay properties" to the spi tree Mark Brown
2019-04-08 7:31 ` Mark Brown
2019-04-08 7:31 ` Mark Brown
2019-04-08 7:31 ` Mark Brown
2019-04-05 0:14 ` [PATCH V2 20/20] spi: tegra114: add support for tuning TX and RX trimmers Sowjanya Komatineni
2019-04-05 0:14 ` Sowjanya Komatineni
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