From: fabrizio.castro@bp.renesas.com (Fabrizio Castro)
To: cip-dev@lists.cip-project.org
Subject: [cip-dev] [PATCH 4.19.y 19/29] arm64: dts: renesas: r8a774c0: Add audio support
Date: Wed, 1 May 2019 11:22:13 +0100 [thread overview]
Message-ID: <1556706143-11898-20-git-send-email-fabrizio.castro@bp.renesas.com> (raw)
In-Reply-To: <1556706143-11898-1-git-send-email-fabrizio.castro@bp.renesas.com>
commit cf8f74d6587d96abf746041d4df1425715f69c85 upstream.
Add sound support for the RZ/G2E SoC (a.k.a. R8A774C0).
This work is based on similar work done on the R8A77990 SoC
by Yoshihiro Kaneko <ykaneko0929@gmail.com>.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 241 ++++++++++++++++++++++++++++++
1 file changed, 241 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
index 0450fb2..7a38fa1 100644
--- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
@@ -1176,6 +1176,247 @@
status = "disabled";
};
+ rcar_sound: sound at ec500000 {
+ /*
+ * #sound-dai-cells is required
+ *
+ * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
+ * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
+ */
+ /*
+ * #clock-cells is required for audio_clkout0/1/2/3
+ *
+ * clkout : #clock-cells = <0>; <&rcar_sound>;
+ * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
+ */
+ compatible = "renesas,rcar_sound-r8a774c0",
+ "renesas,rcar_sound-gen3";
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
+ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+ clocks = <&cpg CPG_MOD 1005>,
+ <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+ <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+ <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+ <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+ <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+ <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
+ <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
+ <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
+ <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
+ <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
+ <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+ <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+ <&audio_clk_a>, <&audio_clk_b>,
+ <&audio_clk_c>,
+ <&cpg CPG_CORE R8A774C0_CLK_ZA2>;
+ clock-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0",
+ "src.9", "src.8", "src.7", "src.6",
+ "src.5", "src.4", "src.3", "src.2",
+ "src.1", "src.0",
+ "mix.1", "mix.0",
+ "ctu.1", "ctu.0",
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b", "clk_c", "clk_i";
+ power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
+ resets = <&cpg 1005>,
+ <&cpg 1006>, <&cpg 1007>,
+ <&cpg 1008>, <&cpg 1009>,
+ <&cpg 1010>, <&cpg 1011>,
+ <&cpg 1012>, <&cpg 1013>,
+ <&cpg 1014>, <&cpg 1015>;
+ reset-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0";
+ status = "disabled";
+
+ rcar_sound,dvc {
+ dvc0: dvc-0 {
+ dmas = <&audma0 0xbc>;
+ dma-names = "tx";
+ };
+ dvc1: dvc-1 {
+ dmas = <&audma0 0xbe>;
+ dma-names = "tx";
+ };
+ };
+
+ rcar_sound,mix {
+ mix0: mix-0 { };
+ mix1: mix-1 { };
+ };
+
+ rcar_sound,ctu {
+ ctu00: ctu-0 { };
+ ctu01: ctu-1 { };
+ ctu02: ctu-2 { };
+ ctu03: ctu-3 { };
+ ctu10: ctu-4 { };
+ ctu11: ctu-5 { };
+ ctu12: ctu-6 { };
+ ctu13: ctu-7 { };
+ };
+
+ rcar_sound,src {
+ src0: src-0 {
+ interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x85>, <&audma0 0x9a>;
+ dma-names = "rx", "tx";
+ };
+ src1: src-1 {
+ interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x87>, <&audma0 0x9c>;
+ dma-names = "rx", "tx";
+ };
+ src2: src-2 {
+ interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x89>, <&audma0 0x9e>;
+ dma-names = "rx", "tx";
+ };
+ src3: src-3 {
+ interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8b>, <&audma0 0xa0>;
+ dma-names = "rx", "tx";
+ };
+ src4: src-4 {
+ interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8d>, <&audma0 0xb0>;
+ dma-names = "rx", "tx";
+ };
+ src5: src-5 {
+ interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8f>, <&audma0 0xb2>;
+ dma-names = "rx", "tx";
+ };
+ src6: src-6 {
+ interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x91>, <&audma0 0xb4>;
+ dma-names = "rx", "tx";
+ };
+ src7: src-7 {
+ interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x93>, <&audma0 0xb6>;
+ dma-names = "rx", "tx";
+ };
+ src8: src-8 {
+ interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x95>, <&audma0 0xb8>;
+ dma-names = "rx", "tx";
+ };
+ src9: src-9 {
+ interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x97>, <&audma0 0xba>;
+ dma-names = "rx", "tx";
+ };
+ };
+
+ rcar_sound,ssi {
+ ssi0: ssi-0 {
+ interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x01>, <&audma0 0x02>,
+ <&audma0 0x15>, <&audma0 0x16>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi1: ssi-1 {
+ interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x03>, <&audma0 0x04>,
+ <&audma0 0x49>, <&audma0 0x4a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi2: ssi-2 {
+ interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x05>, <&audma0 0x06>,
+ <&audma0 0x63>, <&audma0 0x64>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi3: ssi-3 {
+ interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x07>, <&audma0 0x08>,
+ <&audma0 0x6f>, <&audma0 0x70>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi4: ssi-4 {
+ interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x09>, <&audma0 0x0a>,
+ <&audma0 0x71>, <&audma0 0x72>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi5: ssi-5 {
+ interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0b>, <&audma0 0x0c>,
+ <&audma0 0x73>, <&audma0 0x74>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi6: ssi-6 {
+ interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0d>, <&audma0 0x0e>,
+ <&audma0 0x75>, <&audma0 0x76>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi7: ssi-7 {
+ interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0f>, <&audma0 0x10>,
+ <&audma0 0x79>, <&audma0 0x7a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi8: ssi-8 {
+ interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x11>, <&audma0 0x12>,
+ <&audma0 0x7b>, <&audma0 0x7c>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi9: ssi-9 {
+ interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x13>, <&audma0 0x14>,
+ <&audma0 0x7d>, <&audma0 0x7e>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ };
+ };
+
+ audma0: dma-controller at ec700000 {
+ compatible = "renesas,dmac-r8a774c0",
+ "renesas,rcar-dmac";
+ reg = <0 0xec700000 0 0x10000>;
+ interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
+ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ };
+
sdhi0: sd at ee100000 {
compatible = "renesas,sdhi-r8a774c0",
"renesas,rcar-gen3-sdhi";
--
2.7.4
next prev parent reply other threads:[~2019-05-01 10:22 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-01 10:21 [cip-dev] [PATCH 4.19.y 00/29] Add further support for the RZ/G2M Fabrizio Castro
2019-05-01 10:21 ` [cip-dev] [PATCH 4.19.y 01/29] iommu/ipmmu-vmsa: Hook up R8A774A1 DT maching code Fabrizio Castro
2019-05-01 10:21 ` [cip-dev] [PATCH 4.19.y 02/29] iommu/ipmmu-vmsa: Modify ipmmu_slave_whitelist() to check SoC revisions Fabrizio Castro
2019-05-02 21:27 ` Pavel Machek
2019-05-03 9:34 ` Fabrizio Castro
2019-05-07 2:11 ` Nobuhiro Iwamatsu
2019-05-01 10:21 ` [cip-dev] [PATCH 4.19.y 03/29] iommu/ipmmu-vmsa: Hook up r8a774c0 DT matching code Fabrizio Castro
2019-05-01 10:21 ` [cip-dev] [PATCH 4.19.y 04/29] dt-bindings: iommu: ipmmu-vmsa: Add r8a774a1 support Fabrizio Castro
2019-05-01 10:21 ` [cip-dev] [PATCH 4.19.y 05/29] dt-bindings: iommu: ipmmu-vmsa: Add r8a774c0 support Fabrizio Castro
2019-05-01 10:22 ` [cip-dev] [PATCH 4.19.y 06/29] arm64: dts: renesas: r8a774c0: Add IPMMU device nodes Fabrizio Castro
2019-05-01 10:22 ` [cip-dev] [PATCH 4.19.y 07/29] media: rcar-vin: Add support for R-Car R8A77990 Fabrizio Castro
2019-05-01 10:22 ` [cip-dev] [PATCH 4.19.y 08/29] media: rcar-vin: Add support for RZ/G2E Fabrizio Castro
2019-05-01 10:22 ` [cip-dev] [PATCH 4.19.y 09/29] media: rcar-csi2: Add R8A77990 support Fabrizio Castro
2019-05-01 10:22 ` [cip-dev] [PATCH 4.19.y 10/29] media: rcar: rcar-csi2: Update V3M/E3 PHTW tables Fabrizio Castro
2019-05-01 10:22 ` [cip-dev] [PATCH 4.19.y 11/29] media: rcar-csi2: Handle per-SoC number of channels Fabrizio Castro
2019-05-01 10:22 ` [cip-dev] [PATCH 4.19.y 12/29] media: rcar-csi2: Fix PHTW table values for E3/V3M Fabrizio Castro
2019-05-01 10:22 ` [cip-dev] [PATCH 4.19.y 13/29] media: rcar-csi2: Add support for RZ/G2E Fabrizio Castro
2019-05-02 21:29 ` Pavel Machek
2019-05-03 9:40 ` Fabrizio Castro
2019-05-01 10:22 ` [cip-dev] [PATCH 4.19.y 14/29] media: dt-bindings: rcar-vin: Add R8A774C0 support Fabrizio Castro
2019-05-01 10:22 ` [cip-dev] [PATCH 4.19.y 15/29] media: dt-bindings: rcar-csi2: Add r8a774c0 Fabrizio Castro
2019-05-01 10:22 ` [cip-dev] [PATCH 4.19.y 16/29] arm64: dts: renesas: r8a774c0: Add VIN and CSI-2 device nodes Fabrizio Castro
2019-05-01 10:22 ` [cip-dev] [PATCH 4.19.y 17/29] ASoC: rsnd: Add r8a774a1 support Fabrizio Castro
2019-05-01 10:22 ` [cip-dev] [PATCH 4.19.y 18/29] ASoC: rsnd: Add r8a774c0 support Fabrizio Castro
2019-05-01 10:22 ` Fabrizio Castro [this message]
2019-05-01 10:22 ` [cip-dev] [PATCH 4.19.y 20/29] dt-bindings: pwm: rcar: Add r8a774a1 support Fabrizio Castro
2019-05-01 10:22 ` [cip-dev] [PATCH 4.19.y 21/29] dt-bindings: pwm: rcar: Add r8a774c0 support Fabrizio Castro
2019-05-01 10:22 ` [cip-dev] [PATCH 4.19.y 22/29] arm64: dts: renesas: r8a774c0: Add PWM support Fabrizio Castro
2019-05-01 10:22 ` [cip-dev] [PATCH 4.19.y 23/29] arm64: dts: renesas: r8a774c0: Connect RZ/G2E SYS-DMAC to IPMMU Fabrizio Castro
2019-05-01 10:22 ` [cip-dev] [PATCH 4.19.y 24/29] arm64: dts: renesas: r8a774c0: Connect RZ/G2E AVB " Fabrizio Castro
2019-05-01 10:22 ` [cip-dev] [PATCH 4.19.y 25/29] arm64: dts: renesas: r8a774c0: Connect RZ/G2E Audio-DMAC " Fabrizio Castro
2019-05-01 10:22 ` [cip-dev] [PATCH 4.19.y 26/29] thermal: rcar_thermal: add R8A774C0 support Fabrizio Castro
2019-05-01 10:22 ` [cip-dev] [PATCH 4.19.y 27/29] dt-bindings: thermal: rcar-thermal: " Fabrizio Castro
2019-05-01 10:22 ` [cip-dev] [PATCH 4.19.y 28/29] arm64: dts: renesas: r8a774c0: Add thermal support Fabrizio Castro
2019-05-01 10:22 ` [cip-dev] [PATCH 4.19.y 29/29] arm64: defconfig: Enable R-Car thermal driver Fabrizio Castro
2019-05-02 21:34 ` Pavel Machek
2019-05-03 10:25 ` Fabrizio Castro
2019-05-01 20:48 ` [cip-dev] [PATCH 4.19.y 00/29] Add further support for the RZ/G2M Pavel Machek
2019-05-02 21:32 ` Pavel Machek
2019-05-07 1:44 ` nobuhiro1.iwamatsu at toshiba.co.jp
2019-05-07 9:14 ` Chris Paterson
2019-05-07 14:38 ` Fabrizio Castro
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