From: John Garry <john.garry@huawei.com> To: <peterz@infradead.org>, <mingo@redhat.com>, <acme@kernel.org>, <alexander.shishkin@linux.intel.com>, <jolsa@redhat.com>, <namhyung@kernel.org>, <tmricht@linux.ibm.com>, <brueckner@linux.ibm.com>, <kan.liang@linux.intel.com>, <ben@decadent.org.uk>, <mathieu.poirier@linaro.org>, <mark.rutland@arm.com>, <will.deacon@arm.com> Cc: <linux-kernel@vger.kernel.org>, <linuxarm@huawei.com>, <linux-arm-kernel@lists.infradead.org>, <zhangshaokun@hisilicon.com>, <ak@linux.intel.com>, John Garry <john.garry@huawei.com> Subject: [PATCH 3/5] perf jevents: Add support for Hisi hip08 DDRC PMU aliasing Date: Mon, 10 Jun 2019 17:59:30 +0800 [thread overview] Message-ID: <1560160772-210844-4-git-send-email-john.garry@huawei.com> (raw) In-Reply-To: <1560160772-210844-1-git-send-email-john.garry@huawei.com> Add support for Hisi hip08 DDRC PMU event aliasing. We can now do something like this: $perf list [snip] uncore ddrc: uncore_hisi_sccl_ddrc.act_cmd [DDRC active commands. Unit: hisi_sccl,ddrc] uncore_hisi_sccl_ddrc.flux_rcmd [DDRC read commands. Unit: hisi_sccl,ddrc] uncore_hisi_sccl_ddrc.flux_wcmd [DDRC write commands. Unit: hisi_sccl,ddrc] uncore_hisi_sccl_ddrc.flux_wr [DDRC precharge commands. Unit: hisi_sccl,ddrc] uncore_hisi_sccl_ddrc.rnk_chg [DDRC rank commands. Unit: hisi_sccl,ddrc] uncore_hisi_sccl_ddrc.rw_chg [DDRC read and write changes. Unit: hisi_sccl,ddrc] $sudo ./perf stat -e uncore_hisi_sccl_ddrc.flux_rcmd --no-merge sleep 1 Performance counter stats for 'system wide': 0 uncore_hisi_sccl_ddrc.flux_rcmd [hisi_sccl1_ddrc0] 0 uncore_hisi_sccl_ddrc.flux_rcmd [hisi_sccl3_ddrc1] 0 uncore_hisi_sccl_ddrc.flux_rcmd [hisi_sccl1_ddrc3] 0 uncore_hisi_sccl_ddrc.flux_rcmd [hisi_sccl1_ddrc1] 0 uncore_hisi_sccl_ddrc.flux_rcmd [hisi_sccl3_ddrc2] 0 uncore_hisi_sccl_ddrc.flux_rcmd [hisi_sccl3_ddrc0] 25,722 uncore_hisi_sccl_ddrc.flux_rcmd [hisi_sccl1_ddrc2] 0 uncore_hisi_sccl_ddrc.flux_rcmd [hisi_sccl3_ddrc3] 1.001344685 seconds time elapsed The kernel driver is in drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c Signed-off-by: John Garry <john.garry@huawei.com> --- .../arm64/hisilicon/hip08/uncore-ddrc.json | 44 +++++++++++++++++++ tools/perf/pmu-events/jevents.c | 1 + 2 files changed, 45 insertions(+) create mode 100644 tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json new file mode 100644 index 000000000000..901b1fe65629 --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json @@ -0,0 +1,44 @@ +[ + { + "EventCode": "0x02", + "EventName": "uncore_hisi_sccl_ddrc.flux_wcmd", + "BriefDescription": "DDRC write commands", + "PublicDescription": "DDRC write commands", + "Unit": "hisi_sccl,ddrc", + }, + { + "EventCode": "0x03", + "EventName": "uncore_hisi_sccl_ddrc.flux_rcmd", + "BriefDescription": "DDRC read commands", + "PublicDescription": "DDRC read commands", + "Unit": "hisi_sccl,ddrc", + }, + { + "EventCode": "0x04", + "EventName": "uncore_hisi_sccl_ddrc.flux_wr", + "BriefDescription": "DDRC precharge commands", + "PublicDescription": "DDRC precharge commands", + "Unit": "hisi_sccl,ddrc", + }, + { + "EventCode": "0x05", + "EventName": "uncore_hisi_sccl_ddrc.act_cmd", + "BriefDescription": "DDRC active commands", + "PublicDescription": "DDRC active commands", + "Unit": "hisi_sccl,ddrc", + }, + { + "EventCode": "0x06", + "EventName": "uncore_hisi_sccl_ddrc.rnk_chg", + "BriefDescription": "DDRC rank commands", + "PublicDescription": "DDRC rank commands", + "Unit": "hisi_sccl,ddrc", + }, + { + "EventCode": "0x07", + "EventName": "uncore_hisi_sccl_ddrc.rw_chg", + "BriefDescription": "DDRC read and write changes", + "PublicDescription": "DDRC read and write changes", + "Unit": "hisi_sccl,ddrc", + }, +] diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c index 58f77fd0f59f..cf9a60333554 100644 --- a/tools/perf/pmu-events/jevents.c +++ b/tools/perf/pmu-events/jevents.c @@ -236,6 +236,7 @@ static struct map { { "CPU-M-CF", "cpum_cf" }, { "CPU-M-SF", "cpum_sf" }, { "UPI LL", "uncore_upi" }, + { "hisi_sccl,ddrc", "hisi_sccl,ddrc" }, {} }; -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: John Garry <john.garry@huawei.com> To: <peterz@infradead.org>, <mingo@redhat.com>, <acme@kernel.org>, <alexander.shishkin@linux.intel.com>, <jolsa@redhat.com>, <namhyung@kernel.org>, <tmricht@linux.ibm.com>, <brueckner@linux.ibm.com>, <kan.liang@linux.intel.com>, <ben@decadent.org.uk>, <mathieu.poirier@linaro.org>, <mark.rutland@arm.com>, <will.deacon@arm.com> Cc: ak@linux.intel.com, John Garry <john.garry@huawei.com>, linux-kernel@vger.kernel.org, linuxarm@huawei.com, zhangshaokun@hisilicon.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/5] perf jevents: Add support for Hisi hip08 DDRC PMU aliasing Date: Mon, 10 Jun 2019 17:59:30 +0800 [thread overview] Message-ID: <1560160772-210844-4-git-send-email-john.garry@huawei.com> (raw) In-Reply-To: <1560160772-210844-1-git-send-email-john.garry@huawei.com> Add support for Hisi hip08 DDRC PMU event aliasing. We can now do something like this: $perf list [snip] uncore ddrc: uncore_hisi_sccl_ddrc.act_cmd [DDRC active commands. Unit: hisi_sccl,ddrc] uncore_hisi_sccl_ddrc.flux_rcmd [DDRC read commands. Unit: hisi_sccl,ddrc] uncore_hisi_sccl_ddrc.flux_wcmd [DDRC write commands. Unit: hisi_sccl,ddrc] uncore_hisi_sccl_ddrc.flux_wr [DDRC precharge commands. Unit: hisi_sccl,ddrc] uncore_hisi_sccl_ddrc.rnk_chg [DDRC rank commands. Unit: hisi_sccl,ddrc] uncore_hisi_sccl_ddrc.rw_chg [DDRC read and write changes. Unit: hisi_sccl,ddrc] $sudo ./perf stat -e uncore_hisi_sccl_ddrc.flux_rcmd --no-merge sleep 1 Performance counter stats for 'system wide': 0 uncore_hisi_sccl_ddrc.flux_rcmd [hisi_sccl1_ddrc0] 0 uncore_hisi_sccl_ddrc.flux_rcmd [hisi_sccl3_ddrc1] 0 uncore_hisi_sccl_ddrc.flux_rcmd [hisi_sccl1_ddrc3] 0 uncore_hisi_sccl_ddrc.flux_rcmd [hisi_sccl1_ddrc1] 0 uncore_hisi_sccl_ddrc.flux_rcmd [hisi_sccl3_ddrc2] 0 uncore_hisi_sccl_ddrc.flux_rcmd [hisi_sccl3_ddrc0] 25,722 uncore_hisi_sccl_ddrc.flux_rcmd [hisi_sccl1_ddrc2] 0 uncore_hisi_sccl_ddrc.flux_rcmd [hisi_sccl3_ddrc3] 1.001344685 seconds time elapsed The kernel driver is in drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c Signed-off-by: John Garry <john.garry@huawei.com> --- .../arm64/hisilicon/hip08/uncore-ddrc.json | 44 +++++++++++++++++++ tools/perf/pmu-events/jevents.c | 1 + 2 files changed, 45 insertions(+) create mode 100644 tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json new file mode 100644 index 000000000000..901b1fe65629 --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json @@ -0,0 +1,44 @@ +[ + { + "EventCode": "0x02", + "EventName": "uncore_hisi_sccl_ddrc.flux_wcmd", + "BriefDescription": "DDRC write commands", + "PublicDescription": "DDRC write commands", + "Unit": "hisi_sccl,ddrc", + }, + { + "EventCode": "0x03", + "EventName": "uncore_hisi_sccl_ddrc.flux_rcmd", + "BriefDescription": "DDRC read commands", + "PublicDescription": "DDRC read commands", + "Unit": "hisi_sccl,ddrc", + }, + { + "EventCode": "0x04", + "EventName": "uncore_hisi_sccl_ddrc.flux_wr", + "BriefDescription": "DDRC precharge commands", + "PublicDescription": "DDRC precharge commands", + "Unit": "hisi_sccl,ddrc", + }, + { + "EventCode": "0x05", + "EventName": "uncore_hisi_sccl_ddrc.act_cmd", + "BriefDescription": "DDRC active commands", + "PublicDescription": "DDRC active commands", + "Unit": "hisi_sccl,ddrc", + }, + { + "EventCode": "0x06", + "EventName": "uncore_hisi_sccl_ddrc.rnk_chg", + "BriefDescription": "DDRC rank commands", + "PublicDescription": "DDRC rank commands", + "Unit": "hisi_sccl,ddrc", + }, + { + "EventCode": "0x07", + "EventName": "uncore_hisi_sccl_ddrc.rw_chg", + "BriefDescription": "DDRC read and write changes", + "PublicDescription": "DDRC read and write changes", + "Unit": "hisi_sccl,ddrc", + }, +] diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c index 58f77fd0f59f..cf9a60333554 100644 --- a/tools/perf/pmu-events/jevents.c +++ b/tools/perf/pmu-events/jevents.c @@ -236,6 +236,7 @@ static struct map { { "CPU-M-CF", "cpum_cf" }, { "CPU-M-SF", "cpum_sf" }, { "UPI LL", "uncore_upi" }, + { "hisi_sccl,ddrc", "hisi_sccl,ddrc" }, {} }; -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-06-10 10:01 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-06-10 9:59 [PATCH 0/5] Perf uncore PMU event alias support for Hisi hip08 ARM64 platform John Garry 2019-06-10 9:59 ` John Garry 2019-06-10 9:59 ` [PATCH 1/5] perf pmu: Fix uncore PMU alias list for ARM64 John Garry 2019-06-10 9:59 ` John Garry 2019-06-10 9:59 ` [PATCH 2/5] perf pmu: Support more complex PMU event aliasing John Garry 2019-06-10 9:59 ` John Garry 2019-06-11 16:10 ` Jiri Olsa 2019-06-11 16:10 ` Jiri Olsa 2019-06-11 16:22 ` John Garry 2019-06-11 16:22 ` John Garry 2019-06-10 9:59 ` John Garry [this message] 2019-06-10 9:59 ` [PATCH 3/5] perf jevents: Add support for Hisi hip08 DDRC PMU aliasing John Garry 2019-06-10 9:59 ` [PATCH 4/5] perf jevents: Add support for Hisi hip08 HHA " John Garry 2019-06-10 9:59 ` John Garry 2019-06-10 9:59 ` [PATCH 5/5] perf jevents: Add support for Hisi hip08 L3C " John Garry 2019-06-10 9:59 ` John Garry
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