From: biju.das@bp.renesas.com (Biju Das)
To: cip-dev@lists.cip-project.org
Subject: [cip-dev] [PATCH 4.19.y-cip 1/4] arm64: dts: renesas: r8a774c0: Fix cpu nodes style
Date: Mon, 15 Jul 2019 14:48:00 +0100 [thread overview]
Message-ID: <1563198483-8589-2-git-send-email-biju.das@bp.renesas.com> (raw)
In-Reply-To: <1563198483-8589-1-git-send-email-biju.das@bp.renesas.com>
From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
commit 12ce412b2cc6aea88c9c93e6303372f72014efc6 upstream.
We usually leave a space between "=" and the value of device
tree properties, but unfortunately that was overlooked for the
"clocks" property of cpu at 0 and cpu at 1.
This patch fixes the spacing with the "clocks" property of
cpu at 0 and cpu at 1.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
index 8a2e4d8..8678da4 100644
--- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
@@ -76,7 +76,7 @@
power-domains = <&sysc R8A774C0_PD_CA53_CPU0>;
next-level-cache = <&L2_CA53>;
enable-method = "psci";
- clocks =<&cpg CPG_CORE R8A774C0_CLK_Z2>;
+ clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>;
operating-points-v2 = <&cluster1_opp>;
};
@@ -87,7 +87,7 @@
power-domains = <&sysc R8A774C0_PD_CA53_CPU1>;
next-level-cache = <&L2_CA53>;
enable-method = "psci";
- clocks =<&cpg CPG_CORE R8A774C0_CLK_Z2>;
+ clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>;
operating-points-v2 = <&cluster1_opp>;
};
--
2.7.4
next prev parent reply other threads:[~2019-07-15 13:48 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-15 13:47 [cip-dev] [PATCH 4.19.y-cip 0/4] Add CAN support Biju Das
2019-07-15 13:48 ` Biju Das [this message]
2019-07-15 13:48 ` [cip-dev] [PATCH 4.19.y-cip 2/4] arm64: dts: renesas: r8a774c0: Add CAN nodes Biju Das
2019-07-15 13:48 ` [cip-dev] [PATCH 4.19.y-cip 3/4] arm64: dts: renesas: r8a774c0: Add clkp2 clock to " Biju Das
2019-07-15 13:48 ` [cip-dev] [PATCH 4.19.y-cip 4/4] arm64: dts: renesas: cat875: Add CAN support Biju Das
2019-07-15 21:58 ` [cip-dev] [PATCH 4.19.y-cip 0/4] " Pavel Machek
2019-07-16 11:31 ` Pavel Machek
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1563198483-8589-2-git-send-email-biju.das@bp.renesas.com \
--to=biju.das@bp.renesas.com \
--cc=cip-dev@lists.cip-project.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.