From: Nagarjuna Kristam <nkristam@nvidia.com> To: balbi@kernel.org, gregkh@linuxfoundation.org, thierry.reding@gmail.com, jonathanh@nvidia.com, mark.rutland@arm.com, robh+dt@kernel.org Cc: devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-usb@vger.kernel.org, Nagarjuna Kristam <nkristam@nvidia.com> Subject: [Patch V6 3/8] phy: tegra: xusb: Add vbus override support on Tegra210 Date: Thu, 8 Aug 2019 15:07:21 +0530 [thread overview] Message-ID: <1565257046-9890-4-git-send-email-nkristam@nvidia.com> (raw) In-Reply-To: <1565257046-9890-1-git-send-email-nkristam@nvidia.com> Tegra XUSB device control driver needs to control vbus override during its operations, add API for the support. Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com> --- drivers/phy/tegra/xusb-tegra210.c | 57 +++++++++++++++++++++++++++++++++++++++ drivers/phy/tegra/xusb.c | 22 +++++++++++++++ drivers/phy/tegra/xusb.h | 2 ++ include/linux/phy/tegra/xusb.h | 4 ++- 4 files changed, 84 insertions(+), 1 deletion(-) diff --git a/drivers/phy/tegra/xusb-tegra210.c b/drivers/phy/tegra/xusb-tegra210.c index 8c31f03..9e6f14b 100644 --- a/drivers/phy/tegra/xusb-tegra210.c +++ b/drivers/phy/tegra/xusb-tegra210.c @@ -65,6 +65,10 @@ #define XUSB_PADCTL_USB3_PAD_MUX_PCIE_IDDQ_DISABLE(x) (1 << (1 + (x))) #define XUSB_PADCTL_USB3_PAD_MUX_SATA_IDDQ_DISABLE(x) (1 << (8 + (x))) +#define XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPADX_CTL0(x) (0x080 + (x) * 0x40) +#define XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL0_ZIP (1 << 18) +#define XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL0_ZIN (1 << 22) + #define XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPADX_CTL1(x) (0x084 + (x) * 0x40) #define XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL1_VREG_LEV_SHIFT 7 #define XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL1_VREG_LEV_MASK 0x3 @@ -227,6 +231,12 @@ #define XUSB_PADCTL_UPHY_USB3_PADX_ECTL6(x) (0xa74 + (x) * 0x40) #define XUSB_PADCTL_UPHY_USB3_PAD_ECTL6_RX_EQ_CTRL_H_VAL 0xfcf01368 +#define XUSB_PADCTL_USB2_VBUS_ID 0xc60 +#define XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_VBUS_ON (1 << 14) +#define XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_SHIFT 18 +#define XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_MASK 0xf +#define XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_FLOATING 8 + struct tegra210_xusb_fuse_calibration { u32 hs_curr_level[4]; u32 hs_term_range_adj; @@ -2016,6 +2026,51 @@ static const struct tegra_xusb_port_ops tegra210_usb3_port_ops = { .map = tegra210_usb3_port_map, }; +static int tegra210_xusb_padctl_vbus_override(struct tegra_xusb_padctl *padctl, + bool status) +{ + u32 value; + + dev_dbg(padctl->dev, "%s vbus override\n", status ? "set" : "clear"); + + value = padctl_readl(padctl, XUSB_PADCTL_USB2_VBUS_ID); + + if (status) { + value |= XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_VBUS_ON; + value &= ~(XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_MASK << + XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_SHIFT); + value |= XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_FLOATING << + XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_SHIFT; + } else + value &= ~XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_VBUS_ON; + + padctl_writel(padctl, value, XUSB_PADCTL_USB2_VBUS_ID); + + return 0; +} + +static int tegra210_utmi_port_reset(struct phy *phy) +{ + struct tegra_xusb_padctl *padctl; + struct tegra_xusb_lane *lane; + u32 value; + + lane = phy_get_drvdata(phy); + padctl = lane->pad->padctl; + + value = padctl_readl(padctl, + XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPADX_CTL0(lane->index)); + + if ((value & XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL0_ZIP) || + (value & XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL0_ZIN)) { + tegra210_xusb_padctl_vbus_override(padctl, false); + tegra210_xusb_padctl_vbus_override(padctl, true); + return 1; + } + + return 0; +} + static int tegra210_xusb_read_fuse_calibration(struct tegra210_xusb_fuse_calibration *fuse) { @@ -2078,6 +2133,8 @@ static const struct tegra_xusb_padctl_ops tegra210_xusb_padctl_ops = { .remove = tegra210_xusb_padctl_remove, .usb3_set_lfps_detect = tegra210_usb3_set_lfps_detect, .hsic_set_idle = tegra210_hsic_set_idle, + .vbus_override = tegra210_xusb_padctl_vbus_override, + .utmi_port_reset = tegra210_utmi_port_reset, }; static const char * const tegra210_xusb_padctl_supply_names[] = { diff --git a/drivers/phy/tegra/xusb.c b/drivers/phy/tegra/xusb.c index b4b217e..bf4b008 100644 --- a/drivers/phy/tegra/xusb.c +++ b/drivers/phy/tegra/xusb.c @@ -1121,6 +1121,28 @@ int tegra_xusb_padctl_usb3_set_lfps_detect(struct tegra_xusb_padctl *padctl, } EXPORT_SYMBOL_GPL(tegra_xusb_padctl_usb3_set_lfps_detect); +int tegra_xusb_padctl_set_vbus_override(struct tegra_xusb_padctl *padctl, + bool val) +{ + if (padctl->soc->ops->vbus_override) + return padctl->soc->ops->vbus_override(padctl, val); + + return -ENOTSUPP; +} +EXPORT_SYMBOL_GPL(tegra_xusb_padctl_set_vbus_override); + +int tegra_phy_xusb_utmi_port_reset(struct phy *phy) +{ + struct tegra_xusb_lane *lane = phy_get_drvdata(phy); + struct tegra_xusb_padctl *padctl = lane->pad->padctl; + + if (padctl->soc->ops->utmi_port_reset) + return padctl->soc->ops->utmi_port_reset(phy); + + return -ENOTSUPP; +} +EXPORT_SYMBOL_GPL(tegra_phy_xusb_utmi_port_reset); + MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>"); MODULE_DESCRIPTION("Tegra XUSB Pad Controller driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/phy/tegra/xusb.h b/drivers/phy/tegra/xusb.h index bd91832..da94fcc 100644 --- a/drivers/phy/tegra/xusb.h +++ b/drivers/phy/tegra/xusb.h @@ -373,6 +373,8 @@ struct tegra_xusb_padctl_ops { unsigned int index, bool idle); int (*usb3_set_lfps_detect)(struct tegra_xusb_padctl *padctl, unsigned int index, bool enable); + int (*vbus_override)(struct tegra_xusb_padctl *padctl, bool set); + int (*utmi_port_reset)(struct phy *phy); }; struct tegra_xusb_padctl_soc { diff --git a/include/linux/phy/tegra/xusb.h b/include/linux/phy/tegra/xusb.h index ee59562..1235865 100644 --- a/include/linux/phy/tegra/xusb.h +++ b/include/linux/phy/tegra/xusb.h @@ -18,5 +18,7 @@ int tegra_xusb_padctl_hsic_set_idle(struct tegra_xusb_padctl *padctl, unsigned int port, bool idle); int tegra_xusb_padctl_usb3_set_lfps_detect(struct tegra_xusb_padctl *padctl, unsigned int port, bool enable); - +int tegra_xusb_padctl_set_vbus_override(struct tegra_xusb_padctl *padctl, + bool val); +int tegra_phy_xusb_utmi_port_reset(struct phy *phy); #endif /* PHY_TEGRA_XUSB_H */ -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Nagarjuna Kristam <nkristam@nvidia.com> To: <balbi@kernel.org>, <gregkh@linuxfoundation.org>, <thierry.reding@gmail.com>, <jonathanh@nvidia.com>, <mark.rutland@arm.com>, <robh+dt@kernel.org> Cc: <devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>, <linux-usb@vger.kernel.org>, Nagarjuna Kristam <nkristam@nvidia.com> Subject: [Patch V6 3/8] phy: tegra: xusb: Add vbus override support on Tegra210 Date: Thu, 8 Aug 2019 15:07:21 +0530 [thread overview] Message-ID: <1565257046-9890-4-git-send-email-nkristam@nvidia.com> (raw) In-Reply-To: <1565257046-9890-1-git-send-email-nkristam@nvidia.com> Tegra XUSB device control driver needs to control vbus override during its operations, add API for the support. Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com> --- drivers/phy/tegra/xusb-tegra210.c | 57 +++++++++++++++++++++++++++++++++++++++ drivers/phy/tegra/xusb.c | 22 +++++++++++++++ drivers/phy/tegra/xusb.h | 2 ++ include/linux/phy/tegra/xusb.h | 4 ++- 4 files changed, 84 insertions(+), 1 deletion(-) diff --git a/drivers/phy/tegra/xusb-tegra210.c b/drivers/phy/tegra/xusb-tegra210.c index 8c31f03..9e6f14b 100644 --- a/drivers/phy/tegra/xusb-tegra210.c +++ b/drivers/phy/tegra/xusb-tegra210.c @@ -65,6 +65,10 @@ #define XUSB_PADCTL_USB3_PAD_MUX_PCIE_IDDQ_DISABLE(x) (1 << (1 + (x))) #define XUSB_PADCTL_USB3_PAD_MUX_SATA_IDDQ_DISABLE(x) (1 << (8 + (x))) +#define XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPADX_CTL0(x) (0x080 + (x) * 0x40) +#define XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL0_ZIP (1 << 18) +#define XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL0_ZIN (1 << 22) + #define XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPADX_CTL1(x) (0x084 + (x) * 0x40) #define XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL1_VREG_LEV_SHIFT 7 #define XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL1_VREG_LEV_MASK 0x3 @@ -227,6 +231,12 @@ #define XUSB_PADCTL_UPHY_USB3_PADX_ECTL6(x) (0xa74 + (x) * 0x40) #define XUSB_PADCTL_UPHY_USB3_PAD_ECTL6_RX_EQ_CTRL_H_VAL 0xfcf01368 +#define XUSB_PADCTL_USB2_VBUS_ID 0xc60 +#define XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_VBUS_ON (1 << 14) +#define XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_SHIFT 18 +#define XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_MASK 0xf +#define XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_FLOATING 8 + struct tegra210_xusb_fuse_calibration { u32 hs_curr_level[4]; u32 hs_term_range_adj; @@ -2016,6 +2026,51 @@ static const struct tegra_xusb_port_ops tegra210_usb3_port_ops = { .map = tegra210_usb3_port_map, }; +static int tegra210_xusb_padctl_vbus_override(struct tegra_xusb_padctl *padctl, + bool status) +{ + u32 value; + + dev_dbg(padctl->dev, "%s vbus override\n", status ? "set" : "clear"); + + value = padctl_readl(padctl, XUSB_PADCTL_USB2_VBUS_ID); + + if (status) { + value |= XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_VBUS_ON; + value &= ~(XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_MASK << + XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_SHIFT); + value |= XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_FLOATING << + XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_SHIFT; + } else + value &= ~XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_VBUS_ON; + + padctl_writel(padctl, value, XUSB_PADCTL_USB2_VBUS_ID); + + return 0; +} + +static int tegra210_utmi_port_reset(struct phy *phy) +{ + struct tegra_xusb_padctl *padctl; + struct tegra_xusb_lane *lane; + u32 value; + + lane = phy_get_drvdata(phy); + padctl = lane->pad->padctl; + + value = padctl_readl(padctl, + XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPADX_CTL0(lane->index)); + + if ((value & XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL0_ZIP) || + (value & XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL0_ZIN)) { + tegra210_xusb_padctl_vbus_override(padctl, false); + tegra210_xusb_padctl_vbus_override(padctl, true); + return 1; + } + + return 0; +} + static int tegra210_xusb_read_fuse_calibration(struct tegra210_xusb_fuse_calibration *fuse) { @@ -2078,6 +2133,8 @@ static const struct tegra_xusb_padctl_ops tegra210_xusb_padctl_ops = { .remove = tegra210_xusb_padctl_remove, .usb3_set_lfps_detect = tegra210_usb3_set_lfps_detect, .hsic_set_idle = tegra210_hsic_set_idle, + .vbus_override = tegra210_xusb_padctl_vbus_override, + .utmi_port_reset = tegra210_utmi_port_reset, }; static const char * const tegra210_xusb_padctl_supply_names[] = { diff --git a/drivers/phy/tegra/xusb.c b/drivers/phy/tegra/xusb.c index b4b217e..bf4b008 100644 --- a/drivers/phy/tegra/xusb.c +++ b/drivers/phy/tegra/xusb.c @@ -1121,6 +1121,28 @@ int tegra_xusb_padctl_usb3_set_lfps_detect(struct tegra_xusb_padctl *padctl, } EXPORT_SYMBOL_GPL(tegra_xusb_padctl_usb3_set_lfps_detect); +int tegra_xusb_padctl_set_vbus_override(struct tegra_xusb_padctl *padctl, + bool val) +{ + if (padctl->soc->ops->vbus_override) + return padctl->soc->ops->vbus_override(padctl, val); + + return -ENOTSUPP; +} +EXPORT_SYMBOL_GPL(tegra_xusb_padctl_set_vbus_override); + +int tegra_phy_xusb_utmi_port_reset(struct phy *phy) +{ + struct tegra_xusb_lane *lane = phy_get_drvdata(phy); + struct tegra_xusb_padctl *padctl = lane->pad->padctl; + + if (padctl->soc->ops->utmi_port_reset) + return padctl->soc->ops->utmi_port_reset(phy); + + return -ENOTSUPP; +} +EXPORT_SYMBOL_GPL(tegra_phy_xusb_utmi_port_reset); + MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>"); MODULE_DESCRIPTION("Tegra XUSB Pad Controller driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/phy/tegra/xusb.h b/drivers/phy/tegra/xusb.h index bd91832..da94fcc 100644 --- a/drivers/phy/tegra/xusb.h +++ b/drivers/phy/tegra/xusb.h @@ -373,6 +373,8 @@ struct tegra_xusb_padctl_ops { unsigned int index, bool idle); int (*usb3_set_lfps_detect)(struct tegra_xusb_padctl *padctl, unsigned int index, bool enable); + int (*vbus_override)(struct tegra_xusb_padctl *padctl, bool set); + int (*utmi_port_reset)(struct phy *phy); }; struct tegra_xusb_padctl_soc { diff --git a/include/linux/phy/tegra/xusb.h b/include/linux/phy/tegra/xusb.h index ee59562..1235865 100644 --- a/include/linux/phy/tegra/xusb.h +++ b/include/linux/phy/tegra/xusb.h @@ -18,5 +18,7 @@ int tegra_xusb_padctl_hsic_set_idle(struct tegra_xusb_padctl *padctl, unsigned int port, bool idle); int tegra_xusb_padctl_usb3_set_lfps_detect(struct tegra_xusb_padctl *padctl, unsigned int port, bool enable); - +int tegra_xusb_padctl_set_vbus_override(struct tegra_xusb_padctl *padctl, + bool val); +int tegra_phy_xusb_utmi_port_reset(struct phy *phy); #endif /* PHY_TEGRA_XUSB_H */ -- 2.7.4
next prev parent reply other threads:[~2019-08-08 9:37 UTC|newest] Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-08-08 9:37 [Patch V6 0/8] Tegra XUSB gadget driver support Nagarjuna Kristam 2019-08-08 9:37 ` Nagarjuna Kristam 2019-08-08 9:37 ` [Patch V6 1/8] phy: tegra: xusb: Add XUSB dual mode support on Tegra210 Nagarjuna Kristam 2019-08-08 9:37 ` Nagarjuna Kristam 2019-08-08 9:37 ` [Patch V6 2/8] phy: tegra: xusb: Add usb3 port fake " Nagarjuna Kristam 2019-08-08 9:37 ` Nagarjuna Kristam 2019-08-08 9:37 ` Nagarjuna Kristam [this message] 2019-08-08 9:37 ` [Patch V6 3/8] phy: tegra: xusb: Add vbus override " Nagarjuna Kristam 2019-08-22 9:04 ` Thierry Reding 2019-08-08 9:37 ` [Patch V6 4/8] dt-bindings: usb: Add NVIDIA Tegra XUSB device mode controller binding Nagarjuna Kristam 2019-08-08 9:37 ` Nagarjuna Kristam 2019-08-21 20:52 ` Rob Herring 2019-08-21 20:52 ` Rob Herring 2019-08-22 9:04 ` Thierry Reding 2019-08-08 9:37 ` [Patch V6 5/8] arm64: tegra: Add xudc node for Tegra210 Nagarjuna Kristam 2019-08-08 9:37 ` Nagarjuna Kristam 2019-08-08 9:37 ` [Patch V6 6/8] arm64: tegra: Enable xudc on Jetson TX1 Nagarjuna Kristam 2019-08-08 9:37 ` Nagarjuna Kristam 2019-08-08 9:37 ` [Patch V6 7/8] usb: gadget: Add UDC driver for tegra XUSB device mode controller Nagarjuna Kristam 2019-08-08 9:37 ` Nagarjuna Kristam 2019-08-09 12:03 ` Felipe Balbi 2019-08-09 12:03 ` Felipe Balbi 2019-08-22 10:29 ` Nagarjuna Kristam 2019-08-22 10:29 ` Nagarjuna Kristam 2019-08-09 14:28 ` kbuild test robot 2019-08-09 14:28 ` kbuild test robot 2019-08-12 12:43 ` Chunfeng Yun 2019-08-12 12:43 ` Chunfeng Yun 2019-08-12 12:49 ` Felipe Balbi 2019-08-12 13:00 ` Chunfeng Yun 2019-08-12 13:00 ` Chunfeng Yun 2019-08-13 10:16 ` Nagarjuna Kristam 2019-08-13 10:16 ` Nagarjuna Kristam 2019-08-22 9:12 ` Thierry Reding 2019-08-22 10:35 ` Nagarjuna Kristam 2019-08-22 10:35 ` Nagarjuna Kristam 2019-08-08 9:37 ` [Patch V6 8/8] arm64: defconfig: Enable tegra XUDC driver Nagarjuna Kristam 2019-08-08 9:37 ` Nagarjuna Kristam 2019-08-22 9:07 ` [Patch V6 0/8] Tegra XUSB gadget driver support Thierry Reding
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