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From: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>
To: qemu-devel@nongnu.org
Cc: aurelien@aurel32.net, amarkovic@wavecomp.com
Subject: [Qemu-devel] [PATCH 08/26] target/mips: Clean up handling of CP0 register 9
Date: Thu, 22 Aug 2019 13:35:32 +0200	[thread overview]
Message-ID: <1566473750-17743-9-git-send-email-aleksandar.markovic@rt-rk.com> (raw)
In-Reply-To: <1566473750-17743-1-git-send-email-aleksandar.markovic@rt-rk.com>

From: Aleksandar Markovic <amarkovic@wavecomp.com>

Clean up handling of CP0 register 9.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
 target/mips/translate.c | 28 ++++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index c046a10..f8baa95 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -6660,7 +6660,7 @@ static void gen_mfhc0(DisasContext *ctx, TCGv arg, int reg, int sel)
         break;
     case CP0_REGISTER_09:
         switch (sel) {
-        case 7:
+        case CP0_REG09__SAAR:
             CP0_CHECK(ctx->saar);
             gen_helper_mfhc0_saar(arg, cpu_env);
             register_name = "SAAR";
@@ -6761,7 +6761,7 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel)
         break;
     case CP0_REGISTER_09:
         switch (sel) {
-        case 7:
+        case CP0_REG09__SAAR:
             CP0_CHECK(ctx->saar);
             gen_helper_mthc0_saar(cpu_env, arg);
             register_name = "SAAR";
@@ -7168,7 +7168,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
         break;
     case CP0_REGISTER_09:
         switch (sel) {
-        case 0:
+        case CP0_REG09__COUNT:
             /* Mark as an IO operation because we read the time.  */
             if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
                 gen_io_start();
@@ -7186,12 +7186,12 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             ctx->base.is_jmp = DISAS_EXIT;
             register_name = "Count";
             break;
-        case 6:
+        case CP0_REG09__SAARI:
             CP0_CHECK(ctx->saar);
             gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SAARI));
             register_name = "SAARI";
             break;
-        case 7:
+        case CP0_REG09__SAAR:
             CP0_CHECK(ctx->saar);
             gen_helper_mfc0_saar(arg, cpu_env);
             register_name = "SAAR";
@@ -7903,16 +7903,16 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
         break;
     case CP0_REGISTER_09:
         switch (sel) {
-        case 0:
+        case CP0_REG09__COUNT:
             gen_helper_mtc0_count(cpu_env, arg);
             register_name = "Count";
             break;
-        case 6:
+        case CP0_REG09__SAARI:
             CP0_CHECK(ctx->saar);
             gen_helper_mtc0_saari(cpu_env, arg);
             register_name = "SAARI";
             break;
-        case 7:
+        case CP0_REG09__SAAR:
             CP0_CHECK(ctx->saar);
             gen_helper_mtc0_saar(cpu_env, arg);
             register_name = "SAAR";
@@ -8656,7 +8656,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
         break;
     case CP0_REGISTER_09:
         switch (sel) {
-        case 0:
+        case CP0_REG09__COUNT:
             /* Mark as an IO operation because we read the time.  */
             if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
                 gen_io_start();
@@ -8674,12 +8674,12 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             ctx->base.is_jmp = DISAS_EXIT;
             register_name = "Count";
             break;
-        case 6:
+        case CP0_REG09__SAARI:
             CP0_CHECK(ctx->saar);
             gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SAARI));
             register_name = "SAARI";
             break;
-        case 7:
+        case CP0_REG09__SAAR:
             CP0_CHECK(ctx->saar);
             gen_helper_dmfc0_saar(arg, cpu_env);
             register_name = "SAAR";
@@ -9374,16 +9374,16 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
         break;
     case CP0_REGISTER_09:
         switch (sel) {
-        case 0:
+        case CP0_REG09__COUNT:
             gen_helper_mtc0_count(cpu_env, arg);
             register_name = "Count";
             break;
-        case 6:
+        case CP0_REG09__SAARI:
             CP0_CHECK(ctx->saar);
             gen_helper_mtc0_saari(cpu_env, arg);
             register_name = "SAARI";
             break;
-        case 7:
+        case CP0_REG09__SAAR:
             CP0_CHECK(ctx->saar);
             gen_helper_mtc0_saar(cpu_env, arg);
             register_name = "SAAR";
-- 
2.7.4



  parent reply	other threads:[~2019-08-22 11:53 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-22 11:35 [Qemu-devel] [PATCH 00/26] Clean up handling of configuration register CP0 Aleksandar Markovic
2019-08-22 11:35 ` [Qemu-devel] [PATCH 01/26] target/mips: Clean up handling of CP0 register 0 Aleksandar Markovic
2019-08-22 11:35 ` [Qemu-devel] [PATCH 02/26] target/mips: Clean up handling of CP0 register 1 Aleksandar Markovic
2019-08-22 11:35 ` [Qemu-devel] [PATCH 03/26] target/mips: Clean up handling of CP0 register 2 Aleksandar Markovic
2019-08-22 11:35 ` [Qemu-devel] [PATCH 04/26] target/mips: Clean up handling of CP0 register 5 Aleksandar Markovic
2019-08-22 11:35 ` [Qemu-devel] [PATCH 05/26] target/mips: Clean up handling of CP0 register 6 Aleksandar Markovic
2019-08-22 11:35 ` [Qemu-devel] [PATCH 06/26] target/mips: Clean up handling of CP0 register 7 Aleksandar Markovic
2019-08-22 11:35 ` [Qemu-devel] [PATCH 07/26] target/mips: Clean up handling of CP0 register 8 Aleksandar Markovic
2019-08-22 11:35 ` Aleksandar Markovic [this message]
2019-08-22 11:35 ` [Qemu-devel] [PATCH 09/26] target/mips: Clean up handling of CP0 register 10 Aleksandar Markovic
2019-08-22 11:35 ` [Qemu-devel] [PATCH 10/26] target/mips: Clean up handling of CP0 register 11 Aleksandar Markovic
2019-08-22 11:35 ` [Qemu-devel] [PATCH 11/26] target/mips: Clean up handling of CP0 register 12 Aleksandar Markovic
2019-08-22 11:35 ` [Qemu-devel] [PATCH 12/26] target/mips: Clean up handling of CP0 register 15 Aleksandar Markovic
2019-08-22 11:35 ` [Qemu-devel] [PATCH 13/26] target/mips: Clean up handling of CP0 register 16 Aleksandar Markovic
2019-08-22 11:35 ` [Qemu-devel] [PATCH 14/26] target/mips: Clean up handling of CP0 register 17 Aleksandar Markovic
2019-08-22 11:35 ` [Qemu-devel] [PATCH 15/26] target/mips: Clean up handling of CP0 register 18 Aleksandar Markovic
2019-08-22 11:35 ` [Qemu-devel] [PATCH 16/26] target/mips: Clean up handling of CP0 register 19 Aleksandar Markovic
2019-08-22 11:35 ` [Qemu-devel] [PATCH 17/26] target/mips: Clean up handling of CP0 register 20 Aleksandar Markovic
2019-08-22 11:35 ` [Qemu-devel] [PATCH 18/26] target/mips: Clean up handling of CP0 register 23 Aleksandar Markovic
2019-08-22 11:35 ` [Qemu-devel] [PATCH 19/26] target/mips: Clean up handling of CP0 register 24 Aleksandar Markovic
2019-08-22 11:35 ` [Qemu-devel] [PATCH 20/26] target/mips: Clean up handling of CP0 register 25 Aleksandar Markovic
2019-08-22 11:35 ` [Qemu-devel] [PATCH 21/26] target/mips: Clean up handling of CP0 register 26 Aleksandar Markovic
2019-08-22 11:35 ` [Qemu-devel] [PATCH 22/26] target/mips: Clean up handling of CP0 register 27 Aleksandar Markovic
2019-08-22 11:35 ` [Qemu-devel] [PATCH 23/26] target/mips: Clean up handling of CP0 register 28 Aleksandar Markovic
2019-08-22 11:35 ` [Qemu-devel] [PATCH 24/26] target/mips: Clean up handling of CP0 register 29 Aleksandar Markovic
2019-08-22 11:35 ` [Qemu-devel] [PATCH 25/26] target/mips: Clean up handling of CP0 register 30 Aleksandar Markovic
2019-08-22 11:35 ` [Qemu-devel] [PATCH 26/26] target/mips: Clean up handling of CP0 register 31 Aleksandar Markovic

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