From: Krishna Yarlagadda <kyarlagadda@nvidia.com> To: gregkh@linuxfoundation.org, robh+dt@kernel.org, mark.rutland@arm.com, thierry.reding@gmail.com, jonathanh@nvidia.com, ldewangan@nvidia.com, jslaby@suse.com Cc: linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, Ahung Cheng <ahcheng@nvidia.com>, Shardar Mohammed <smohammed@nvidia.com>, Krishna Yarlagadda <kyarlagadda@nvidia.com> Subject: [PATCH V2 02/12] serial: tegra: avoid reg access when clk disabled Date: Wed, 4 Sep 2019 10:12:57 +0530 [thread overview] Message-ID: <1567572187-29820-3-git-send-email-kyarlagadda@nvidia.com> (raw) In-Reply-To: <1567572187-29820-1-git-send-email-kyarlagadda@nvidia.com> From: Ahung Cheng <ahcheng@nvidia.com> This avoids two race conditions from the UART shutdown sequence both leading to 'Machine check error in AXI2APB' and kernel oops. One was that the clock was disabled before the DMA was terminated making it possible for the DMA callbacks to be called after the clock was disabled. These callbacks could write to the UART registers causing timeout. The second was that the clock was disabled before the UART was completely flagged as closed. This is done after the shutdown is called and a new write could be started after the clock was disabled. tegra_uart_start_pio_tx could be called causing timeout. Given that the baud rate is reset at the end of shutdown sequence, this fix is to examine the baud rate to avoid register access from both race conditions. Besides, terminate the DMA before disabling the clock. Signed-off-by: Ahung Cheng <ahcheng@nvidia.com> Signed-off-by: Shardar Mohammed <smohammed@nvidia.com> Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> --- drivers/tty/serial/serial-tegra.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c index 9c15c87..29bf7b7 100644 --- a/drivers/tty/serial/serial-tegra.c +++ b/drivers/tty/serial/serial-tegra.c @@ -126,6 +126,8 @@ struct tegra_uart_port { static void tegra_uart_start_next_tx(struct tegra_uart_port *tup); static int tegra_uart_start_rx_dma(struct tegra_uart_port *tup); +static void tegra_uart_dma_channel_free(struct tegra_uart_port *tup, + bool dma_to_memory); static inline unsigned long tegra_uart_read(struct tegra_uart_port *tup, unsigned long reg) @@ -461,6 +463,9 @@ static void tegra_uart_start_next_tx(struct tegra_uart_port *tup) unsigned long count; struct circ_buf *xmit = &tup->uport.state->xmit; + if (!tup->current_baud) + return; + tail = (unsigned long)&xmit->buf[xmit->tail]; count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); if (!count) @@ -832,6 +837,12 @@ static void tegra_uart_hw_deinit(struct tegra_uart_port *tup) tup->current_baud = 0; spin_unlock_irqrestore(&tup->uport.lock, flags); + tup->rx_in_progress = 0; + tup->tx_in_progress = 0; + + tegra_uart_dma_channel_free(tup, true); + tegra_uart_dma_channel_free(tup, false); + clk_disable_unprepare(tup->uart_clk); } @@ -1069,12 +1080,6 @@ static void tegra_uart_shutdown(struct uart_port *u) struct tegra_uart_port *tup = to_tegra_uport(u); tegra_uart_hw_deinit(tup); - - tup->rx_in_progress = 0; - tup->tx_in_progress = 0; - - tegra_uart_dma_channel_free(tup, true); - tegra_uart_dma_channel_free(tup, false); free_irq(u->irq, tup); } -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Krishna Yarlagadda <kyarlagadda@nvidia.com> To: <gregkh@linuxfoundation.org>, <robh+dt@kernel.org>, <mark.rutland@arm.com>, <thierry.reding@gmail.com>, <jonathanh@nvidia.com>, <ldewangan@nvidia.com>, <jslaby@suse.com> Cc: <linux-serial@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>, Ahung Cheng <ahcheng@nvidia.com>, Shardar Mohammed <smohammed@nvidia.com>, "Krishna Yarlagadda" <kyarlagadda@nvidia.com> Subject: [PATCH V2 02/12] serial: tegra: avoid reg access when clk disabled Date: Wed, 4 Sep 2019 10:12:57 +0530 [thread overview] Message-ID: <1567572187-29820-3-git-send-email-kyarlagadda@nvidia.com> (raw) In-Reply-To: <1567572187-29820-1-git-send-email-kyarlagadda@nvidia.com> From: Ahung Cheng <ahcheng@nvidia.com> This avoids two race conditions from the UART shutdown sequence both leading to 'Machine check error in AXI2APB' and kernel oops. One was that the clock was disabled before the DMA was terminated making it possible for the DMA callbacks to be called after the clock was disabled. These callbacks could write to the UART registers causing timeout. The second was that the clock was disabled before the UART was completely flagged as closed. This is done after the shutdown is called and a new write could be started after the clock was disabled. tegra_uart_start_pio_tx could be called causing timeout. Given that the baud rate is reset at the end of shutdown sequence, this fix is to examine the baud rate to avoid register access from both race conditions. Besides, terminate the DMA before disabling the clock. Signed-off-by: Ahung Cheng <ahcheng@nvidia.com> Signed-off-by: Shardar Mohammed <smohammed@nvidia.com> Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> --- drivers/tty/serial/serial-tegra.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c index 9c15c87..29bf7b7 100644 --- a/drivers/tty/serial/serial-tegra.c +++ b/drivers/tty/serial/serial-tegra.c @@ -126,6 +126,8 @@ struct tegra_uart_port { static void tegra_uart_start_next_tx(struct tegra_uart_port *tup); static int tegra_uart_start_rx_dma(struct tegra_uart_port *tup); +static void tegra_uart_dma_channel_free(struct tegra_uart_port *tup, + bool dma_to_memory); static inline unsigned long tegra_uart_read(struct tegra_uart_port *tup, unsigned long reg) @@ -461,6 +463,9 @@ static void tegra_uart_start_next_tx(struct tegra_uart_port *tup) unsigned long count; struct circ_buf *xmit = &tup->uport.state->xmit; + if (!tup->current_baud) + return; + tail = (unsigned long)&xmit->buf[xmit->tail]; count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); if (!count) @@ -832,6 +837,12 @@ static void tegra_uart_hw_deinit(struct tegra_uart_port *tup) tup->current_baud = 0; spin_unlock_irqrestore(&tup->uport.lock, flags); + tup->rx_in_progress = 0; + tup->tx_in_progress = 0; + + tegra_uart_dma_channel_free(tup, true); + tegra_uart_dma_channel_free(tup, false); + clk_disable_unprepare(tup->uart_clk); } @@ -1069,12 +1080,6 @@ static void tegra_uart_shutdown(struct uart_port *u) struct tegra_uart_port *tup = to_tegra_uport(u); tegra_uart_hw_deinit(tup); - - tup->rx_in_progress = 0; - tup->tx_in_progress = 0; - - tegra_uart_dma_channel_free(tup, true); - tegra_uart_dma_channel_free(tup, false); free_irq(u->irq, tup); } -- 2.7.4
next prev parent reply other threads:[~2019-09-04 4:42 UTC|newest] Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-09-04 4:42 [PATCH V2 00/12] serial: tegra: Tegra186 support and fixes Krishna Yarlagadda 2019-09-04 4:42 ` Krishna Yarlagadda 2019-09-04 4:42 ` [PATCH V2 01/12] serial: tegra: add support to ignore read Krishna Yarlagadda 2019-09-04 4:42 ` Krishna Yarlagadda 2019-09-04 4:42 ` Krishna Yarlagadda [this message] 2019-09-04 4:42 ` [PATCH V2 02/12] serial: tegra: avoid reg access when clk disabled Krishna Yarlagadda 2019-09-04 4:42 ` [PATCH V2 03/12] serial: tegra: flush the RX fifo on frame error Krishna Yarlagadda 2019-09-04 4:42 ` Krishna Yarlagadda 2019-09-04 4:42 ` [PATCH V2 04/12] serial: tegra: report error to upper tty layer Krishna Yarlagadda 2019-09-04 4:42 ` Krishna Yarlagadda 2019-09-04 4:43 ` [PATCH V2 05/12] dt-binding: serial: tegra: add new chips Krishna Yarlagadda 2019-09-04 4:43 ` Krishna Yarlagadda 2019-09-04 4:43 ` [PATCH V2 06/12] serial: tegra: check for FIFO mode enabled status Krishna Yarlagadda 2019-09-04 4:43 ` Krishna Yarlagadda 2019-09-04 4:43 ` [PATCH V2 07/12] serial: tegra: set maximum num of uart ports to 8 Krishna Yarlagadda 2019-09-04 4:43 ` Krishna Yarlagadda 2019-09-04 4:43 ` [PATCH V2 08/12] serial: tegra: add support to use 8 bytes trigger Krishna Yarlagadda 2019-09-04 4:43 ` Krishna Yarlagadda 2019-09-04 4:43 ` [PATCH V2 09/12] serial: tegra: DT for Adjusted baud rates Krishna Yarlagadda 2019-09-04 4:43 ` Krishna Yarlagadda 2019-09-04 4:43 ` [PATCH V2 10/12] serial: tegra: add support to adjust baud rate Krishna Yarlagadda 2019-09-04 4:43 ` Krishna Yarlagadda 2019-09-04 4:43 ` [PATCH V2 11/12] serial: tegra: report clk rate errors Krishna Yarlagadda 2019-09-04 4:43 ` Krishna Yarlagadda 2019-09-04 4:43 ` [PATCH V2 12/12] serial: tegra: Add PIO mode support Krishna Yarlagadda 2019-09-04 4:43 ` Krishna Yarlagadda
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