From: Jiaxin Yu <jiaxin.yu@mediatek.com> To: <broonie@kernel.org>, <robh+dt@kernel.org> Cc: alsa-devel@alsa-project.org, lgirdwood@gmail.com, jiaxin.yu@mediatek.com, tzungbi@google.com, linux-mediatek@lists.infradead.org, eason.yen@mediatek.com Subject: [alsa-devel] [PATCH 1/2] ASoC: dt-bingdings: mediatek: mt8183: add a property "medaitek, toprgu" Date: Thu, 12 Sep 2019 17:54:55 +0800 [thread overview] Message-ID: <1568282096-13821-2-git-send-email-jiaxin.yu@mediatek.com> (raw) In-Reply-To: <1568282096-13821-1-git-send-email-jiaxin.yu@mediatek.com> This patch adds a property "mediatek,toprgu" in example so that we could use reset controller(usually we call it toprgu or watchdog) to reset audio domain regs. Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com> --- Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt b/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt index 396ba38619f6..45ca182a4ecc 100644 --- a/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt +++ b/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt @@ -4,6 +4,7 @@ Required properties: - compatible = "mediatek,mt68183-audio"; - reg: register location and size - interrupts: should contain AFE interrupt +- mediatek,toprgu: A phandle to the TOPRGU which for reset controller unit - power-domains: should define the power domain - clocks: Must contain an entry for each entry in clock-names - clock-names: should have these clock names: @@ -20,6 +21,7 @@ Example: compatible = "mediatek,mt8183-audio"; reg = <0 0x11220000 0 0x1000>; interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_LOW>; + mediatek,toprgu = <&watchdog>; power-domains = <&scpsys MT8183_POWER_DOMAIN_AUDIO>; clocks = <&infrasys CLK_INFRA_AUDIO>, <&infrasys CLK_INFRA_AUDIO_26M_BCLK>, -- 2.18.0 _______________________________________________ Alsa-devel mailing list Alsa-devel@alsa-project.org https://mailman.alsa-project.org/mailman/listinfo/alsa-devel
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From: Jiaxin Yu <jiaxin.yu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org> To: broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org Cc: alsa-devel-K7yf7f+aM1XWsZ/bQMPhNw@public.gmane.org, lgirdwood-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, jiaxin.yu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org, perex-/Fr2/VpizcU@public.gmane.org, tzungbi-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org, linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, eason.yen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org Subject: [PATCH 1/2] ASoC: dt-bingdings: mediatek: mt8183: add a property "medaitek, toprgu" Date: Thu, 12 Sep 2019 17:54:55 +0800 [thread overview] Message-ID: <1568282096-13821-2-git-send-email-jiaxin.yu@mediatek.com> (raw) In-Reply-To: <1568282096-13821-1-git-send-email-jiaxin.yu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org> This patch adds a property "mediatek,toprgu" in example so that we could use reset controller(usually we call it toprgu or watchdog) to reset audio domain regs. Signed-off-by: Jiaxin Yu <jiaxin.yu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org> --- Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt b/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt index 396ba38619f6..45ca182a4ecc 100644 --- a/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt +++ b/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt @@ -4,6 +4,7 @@ Required properties: - compatible = "mediatek,mt68183-audio"; - reg: register location and size - interrupts: should contain AFE interrupt +- mediatek,toprgu: A phandle to the TOPRGU which for reset controller unit - power-domains: should define the power domain - clocks: Must contain an entry for each entry in clock-names - clock-names: should have these clock names: @@ -20,6 +21,7 @@ Example: compatible = "mediatek,mt8183-audio"; reg = <0 0x11220000 0 0x1000>; interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_LOW>; + mediatek,toprgu = <&watchdog>; power-domains = <&scpsys MT8183_POWER_DOMAIN_AUDIO>; clocks = <&infrasys CLK_INFRA_AUDIO>, <&infrasys CLK_INFRA_AUDIO_26M_BCLK>, -- 2.18.0
next prev parent reply other threads:[~2019-09-12 9:57 UTC|newest] Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-09-12 9:54 [alsa-devel] [PATCH 0/2] ASoC: mt8183: fix audio playback slowly after playback during bootup Jiaxin Yu 2019-09-12 9:54 ` Jiaxin Yu 2019-09-12 9:54 ` Jiaxin Yu [this message] 2019-09-12 9:54 ` [PATCH 1/2] ASoC: dt-bingdings: mediatek: mt8183: add a property "medaitek, toprgu" Jiaxin Yu 2019-09-12 16:52 ` [alsa-devel] " Yingjoe Chen 2019-09-12 16:52 ` Yingjoe Chen 2019-09-12 9:54 ` [alsa-devel] [PATCH 2/2] ASoC: mt8183: fix audio playback slowly after playback during bootup Jiaxin Yu 2019-09-12 9:54 ` Jiaxin Yu 2019-09-12 16:50 ` [alsa-devel] " Yingjoe Chen 2019-09-12 16:50 ` Yingjoe Chen
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