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From: Sandy Huang <hjc@rock-chips.com>
To: dri-devel@lists.freedesktop.org,
	"Alex Deucher" <alexander.deucher@amd.com>,
	"Christian König" <christian.koenig@amd.com>,
	"David (ChunMing) Zhou" <David1.Zhou@amd.com>,
	"David Airlie" <airlied@linux.ie>,
	"Daniel Vetter" <daniel@ffwll.ch>,
	"Harry Wentland" <harry.wentland@amd.com>,
	"Leo Li" <sunpeng.li@amd.com>,
	"Paul Kocialkowski" <paul.kocialkowski@bootlin.com>,
	"Maxime Ripard" <maxime.ripard@bootlin.com>,
	"Emil Velikov" <emil.velikov@collabora.com>,
	"Sam Ravnborg" <sam@ravnborg.org>,
	"Sandy Huang" <hjc@rock-chips.com>,
	"Huang Rui" <ray.huang@amd.com>,
	"Laurent Pinchart" <laurent.pinchart@ideasonboard.com>,
	"Ville Syrjälä" <ville.syrjala@linux.intel.com>,
	"Russell King" <rmk+kernel@armlinux.org.uk>,
	"Jani Nikula" <jani.nikula@intel.com>,
	"Colin Ian King" <colin.king@canonical.com>,
	"Nicholas Kazlauskas" <nicholas.kazlauskas@amd.com>,
	"Bhawanpreet Lakha" <Bhawanpreet.Lakha@amd.com>,
	"David Francis" <David.Francis@amd.com>,
	"Mario Kleiner" <mario.kleiner.de@gmail.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
	amd-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: [PATCH 06/36] drm/amd: use bpp instead of cpp for drm_format_info
Date: Mon, 23 Sep 2019 20:41:10 +0800	[thread overview]
Message-ID: <1569242500-182337-7-git-send-email-hjc@rock-chips.com> (raw)

cpp[BytePerPlane] can't describe the 10bit data format correctly,
So we use bpp[BitPerPlane] to instead cpp.

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c            | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c            | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c            | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c             | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c             | 2 +-
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 +++---
 6 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
index eb3569b..895a54c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
@@ -133,7 +133,7 @@ static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev,
 	u32 cpp;
 
 	info = drm_get_format_info(adev->ddev, mode_cmd);
-	cpp = info->cpp[0];
+	cpp = info->bpp[0] / 8;
 
 	/* need to align pitch with crtc limits */
 	mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp,
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index 1ffd196..ebf548c 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -2034,7 +2034,7 @@ static int dce_v10_0_crtc_do_set_base(struct drm_crtc *crtc,
 	WREG32(mmGRPH_X_END + amdgpu_crtc->crtc_offset, target_fb->width);
 	WREG32(mmGRPH_Y_END + amdgpu_crtc->crtc_offset, target_fb->height);
 
-	fb_pitch_pixels = target_fb->pitches[0] / target_fb->format->cpp[0];
+	fb_pitch_pixels = target_fb->pitches[0] / target_fb->format->bpp[0] / 8;
 	WREG32(mmGRPH_PITCH + amdgpu_crtc->crtc_offset, fb_pitch_pixels);
 
 	dce_v10_0_grph_enable(crtc, true);
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index 9e0782b..4400a59 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -2076,7 +2076,7 @@ static int dce_v11_0_crtc_do_set_base(struct drm_crtc *crtc,
 	WREG32(mmGRPH_X_END + amdgpu_crtc->crtc_offset, target_fb->width);
 	WREG32(mmGRPH_Y_END + amdgpu_crtc->crtc_offset, target_fb->height);
 
-	fb_pitch_pixels = target_fb->pitches[0] / target_fb->format->cpp[0];
+	fb_pitch_pixels = target_fb->pitches[0] / target_fb->format->bpp[0] / 8;
 	WREG32(mmGRPH_PITCH + amdgpu_crtc->crtc_offset, fb_pitch_pixels);
 
 	dce_v11_0_grph_enable(crtc, true);
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index 4bf453e..fc74153 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -1969,7 +1969,7 @@ static int dce_v6_0_crtc_do_set_base(struct drm_crtc *crtc,
 	WREG32(mmGRPH_X_END + amdgpu_crtc->crtc_offset, target_fb->width);
 	WREG32(mmGRPH_Y_END + amdgpu_crtc->crtc_offset, target_fb->height);
 
-	fb_pitch_pixels = target_fb->pitches[0] / target_fb->format->cpp[0];
+	fb_pitch_pixels = target_fb->pitches[0] / target_fb->format->bpp[0] / 8;
 	WREG32(mmGRPH_PITCH + amdgpu_crtc->crtc_offset, fb_pitch_pixels);
 
 	dce_v6_0_grph_enable(crtc, true);
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index b23418c..94dfb4f 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -1943,7 +1943,7 @@ static int dce_v8_0_crtc_do_set_base(struct drm_crtc *crtc,
 	WREG32(mmGRPH_X_END + amdgpu_crtc->crtc_offset, target_fb->width);
 	WREG32(mmGRPH_Y_END + amdgpu_crtc->crtc_offset, target_fb->height);
 
-	fb_pitch_pixels = target_fb->pitches[0] / target_fb->format->cpp[0];
+	fb_pitch_pixels = target_fb->pitches[0] / target_fb->format->bpp[0] / 8;
 	WREG32(mmGRPH_PITCH + amdgpu_crtc->crtc_offset, fb_pitch_pixels);
 
 	dce_v8_0_grph_enable(crtc, true);
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 760af66..d11ab18 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2746,7 +2746,7 @@ fill_plane_buffer_attributes(struct amdgpu_device *adev,
 		plane_size->grph.surface_size.width = fb->width;
 		plane_size->grph.surface_size.height = fb->height;
 		plane_size->grph.surface_pitch =
-			fb->pitches[0] / fb->format->cpp[0];
+			fb->pitches[0] / fb->format->bpp[0] / 8;
 
 		address->type = PLN_ADDR_TYPE_GRAPHICS;
 		address->grph.addr.low_part = lower_32_bits(afb->address);
@@ -2759,7 +2759,7 @@ fill_plane_buffer_attributes(struct amdgpu_device *adev,
 		plane_size->video.luma_size.width = fb->width;
 		plane_size->video.luma_size.height = fb->height;
 		plane_size->video.luma_pitch =
-			fb->pitches[0] / fb->format->cpp[0];
+			fb->pitches[0] / fb->format->bpp[0] / 8;
 
 		plane_size->video.chroma_size.x = 0;
 		plane_size->video.chroma_size.y = 0;
@@ -2768,7 +2768,7 @@ fill_plane_buffer_attributes(struct amdgpu_device *adev,
 		plane_size->video.chroma_size.height = fb->height / 2;
 
 		plane_size->video.chroma_pitch =
-			fb->pitches[1] / fb->format->cpp[1];
+			fb->pitches[1] / fb->format->bpp[1] / 8;
 
 		address->type = PLN_ADDR_TYPE_VIDEO_PROGRESSIVE;
 		address->video_progressive.luma_addr.low_part =
-- 
2.7.4




WARNING: multiple messages have this Message-ID (diff)
From: Sandy Huang <hjc@rock-chips.com>
To: dri-devel@lists.freedesktop.org,
	"Alex Deucher" <alexander.deucher@amd.com>,
	"Christian König" <christian.koenig@amd.com>,
	"David (ChunMing) Zhou" <David1.Zhou@amd.com>,
	"David Airlie" <airlied@linux.ie>,
	"Daniel Vetter" <daniel@ffwll.ch>,
	"Harry Wentland" <harry.wentland@amd.com>,
	"Leo Li" <sunpeng.li@amd.com>,
	"Paul Kocialkowski" <paul.kocialkowski@bootlin.com>,
	"Maxime Ripard" <maxime.ripard@bootlin.com>,
	"Emil Velikov" <emil.velikov@collabora.com>,
	"Sam Ravnborg" <sam@ravnborg.org>,
	"Sandy Huang" <hjc@rock-chips.com>,
	"Huang Rui" <ray.huang@amd.com>,
	"Laurent Pinchart" <laurent.pinchart@ideasonboard.com>,
	"Ville Syrjälä" <ville.syrjala@linux.intel.com>,
	"Russell King" <rmk+kernel@armlinux.org.uk>,
	"Jani Nikula" <jani.nikula@intel.com>,
	"Colin Ian King" <colin.king@canonical.com>,
	"Nicholas Kazlauskas" <nicholas.kazlauskas@amd.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
	linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org
Subject: [PATCH 06/36] drm/amd: use bpp instead of cpp for drm_format_info
Date: Mon, 23 Sep 2019 20:41:10 +0800	[thread overview]
Message-ID: <1569242500-182337-7-git-send-email-hjc@rock-chips.com> (raw)

cpp[BytePerPlane] can't describe the 10bit data format correctly,
So we use bpp[BitPerPlane] to instead cpp.

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c            | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c            | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c            | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c             | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c             | 2 +-
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 +++---
 6 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
index eb3569b..895a54c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
@@ -133,7 +133,7 @@ static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev,
 	u32 cpp;
 
 	info = drm_get_format_info(adev->ddev, mode_cmd);
-	cpp = info->cpp[0];
+	cpp = info->bpp[0] / 8;
 
 	/* need to align pitch with crtc limits */
 	mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp,
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index 1ffd196..ebf548c 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -2034,7 +2034,7 @@ static int dce_v10_0_crtc_do_set_base(struct drm_crtc *crtc,
 	WREG32(mmGRPH_X_END + amdgpu_crtc->crtc_offset, target_fb->width);
 	WREG32(mmGRPH_Y_END + amdgpu_crtc->crtc_offset, target_fb->height);
 
-	fb_pitch_pixels = target_fb->pitches[0] / target_fb->format->cpp[0];
+	fb_pitch_pixels = target_fb->pitches[0] / target_fb->format->bpp[0] / 8;
 	WREG32(mmGRPH_PITCH + amdgpu_crtc->crtc_offset, fb_pitch_pixels);
 
 	dce_v10_0_grph_enable(crtc, true);
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index 9e0782b..4400a59 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -2076,7 +2076,7 @@ static int dce_v11_0_crtc_do_set_base(struct drm_crtc *crtc,
 	WREG32(mmGRPH_X_END + amdgpu_crtc->crtc_offset, target_fb->width);
 	WREG32(mmGRPH_Y_END + amdgpu_crtc->crtc_offset, target_fb->height);
 
-	fb_pitch_pixels = target_fb->pitches[0] / target_fb->format->cpp[0];
+	fb_pitch_pixels = target_fb->pitches[0] / target_fb->format->bpp[0] / 8;
 	WREG32(mmGRPH_PITCH + amdgpu_crtc->crtc_offset, fb_pitch_pixels);
 
 	dce_v11_0_grph_enable(crtc, true);
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index 4bf453e..fc74153 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -1969,7 +1969,7 @@ static int dce_v6_0_crtc_do_set_base(struct drm_crtc *crtc,
 	WREG32(mmGRPH_X_END + amdgpu_crtc->crtc_offset, target_fb->width);
 	WREG32(mmGRPH_Y_END + amdgpu_crtc->crtc_offset, target_fb->height);
 
-	fb_pitch_pixels = target_fb->pitches[0] / target_fb->format->cpp[0];
+	fb_pitch_pixels = target_fb->pitches[0] / target_fb->format->bpp[0] / 8;
 	WREG32(mmGRPH_PITCH + amdgpu_crtc->crtc_offset, fb_pitch_pixels);
 
 	dce_v6_0_grph_enable(crtc, true);
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index b23418c..94dfb4f 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -1943,7 +1943,7 @@ static int dce_v8_0_crtc_do_set_base(struct drm_crtc *crtc,
 	WREG32(mmGRPH_X_END + amdgpu_crtc->crtc_offset, target_fb->width);
 	WREG32(mmGRPH_Y_END + amdgpu_crtc->crtc_offset, target_fb->height);
 
-	fb_pitch_pixels = target_fb->pitches[0] / target_fb->format->cpp[0];
+	fb_pitch_pixels = target_fb->pitches[0] / target_fb->format->bpp[0] / 8;
 	WREG32(mmGRPH_PITCH + amdgpu_crtc->crtc_offset, fb_pitch_pixels);
 
 	dce_v8_0_grph_enable(crtc, true);
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 760af66..d11ab18 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2746,7 +2746,7 @@ fill_plane_buffer_attributes(struct amdgpu_device *adev,
 		plane_size->grph.surface_size.width = fb->width;
 		plane_size->grph.surface_size.height = fb->height;
 		plane_size->grph.surface_pitch =
-			fb->pitches[0] / fb->format->cpp[0];
+			fb->pitches[0] / fb->format->bpp[0] / 8;
 
 		address->type = PLN_ADDR_TYPE_GRAPHICS;
 		address->grph.addr.low_part = lower_32_bits(afb->address);
@@ -2759,7 +2759,7 @@ fill_plane_buffer_attributes(struct amdgpu_device *adev,
 		plane_size->video.luma_size.width = fb->width;
 		plane_size->video.luma_size.height = fb->height;
 		plane_size->video.luma_pitch =
-			fb->pitches[0] / fb->format->cpp[0];
+			fb->pitches[0] / fb->format->bpp[0] / 8;
 
 		plane_size->video.chroma_size.x = 0;
 		plane_size->video.chroma_size.y = 0;
@@ -2768,7 +2768,7 @@ fill_plane_buffer_attributes(struct amdgpu_device *adev,
 		plane_size->video.chroma_size.height = fb->height / 2;
 
 		plane_size->video.chroma_pitch =
-			fb->pitches[1] / fb->format->cpp[1];
+			fb->pitches[1] / fb->format->bpp[1] / 8;
 
 		address->type = PLN_ADDR_TYPE_VIDEO_PROGRESSIVE;
 		address->video_progressive.luma_addr.low_part =
-- 
2.7.4



_______________________________________________
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             reply	other threads:[~2019-09-23 12:48 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-23 12:41 Sandy Huang [this message]
2019-09-23 12:41 ` [PATCH 06/36] drm/amd: use bpp instead of cpp for drm_format_info Sandy Huang
2019-09-23 12:41 ` [PATCH 07/36] drm/gma500: " Sandy Huang
2019-09-23 12:41 ` [PATCH 08/36] drm/msm: " Sandy Huang
2019-09-23 16:53   ` Rob Clark
2019-09-23 16:53     ` Rob Clark
2019-09-23 12:41 ` [PATCH 09/36] dm/vmwgfx: " Sandy Huang
2019-09-23 12:41   ` Sandy Huang
2019-09-23 12:41 ` [PATCH 10/36] drm/arm: " Sandy Huang
2019-09-23 12:41   ` Sandy Huang

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