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From: Lina Iyer <ilina@codeaurora.org>
To: swboyd@chromium.org, maz@kernel.org, linus.walleij@linaro.org,
	bjorn.andersson@linaro.org
Cc: evgreen@chromium.org, linux-kernel@vger.kernel.org,
	linux-arm-msm@vger.kernel.org, mkshah@codeaurora.org,
	linux-gpio@vger.kernel.org, agross@kernel.org,
	dianders@chromium.org, Lina Iyer <ilina@codeaurora.org>
Subject: [PATCH 01/12] irqdomain: add bus token DOMAIN_BUS_WAKEUP
Date: Thu, 14 Nov 2019 11:35:10 -0700	[thread overview]
Message-ID: <1573756521-27373-2-git-send-email-ilina@codeaurora.org> (raw)
In-Reply-To: <1573756521-27373-1-git-send-email-ilina@codeaurora.org>

A single controller can handle normal interrupts and wake-up interrupts
independently, with a different numbering space. It is thus crucial to
allow the driver for such a controller discriminate between the two.

A simple way to do so is to tag the wake-up irqdomain with a "bus token"
that indicates the wake-up domain. This slightly abuses the notion of
bus, but also radically simplifies the design of such a driver. Between
two evils, we choose the least damaging.

Suggested-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
---
 include/linux/irqdomain.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h
index 583e7ab..3c340db 100644
--- a/include/linux/irqdomain.h
+++ b/include/linux/irqdomain.h
@@ -83,6 +83,7 @@ enum irq_domain_bus_token {
 	DOMAIN_BUS_IPI,
 	DOMAIN_BUS_FSL_MC_MSI,
 	DOMAIN_BUS_TI_SCI_INTA_MSI,
+	DOMAIN_BUS_WAKEUP,
 };
 
 /**
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


  reply	other threads:[~2019-11-14 18:36 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-14 18:35 [PATCH 00/12] Support wakeup capable GPIOs Lina Iyer
2019-11-14 18:35 ` Lina Iyer [this message]
2019-11-15 18:48   ` [PATCH 01/12] irqdomain: add bus token DOMAIN_BUS_WAKEUP Stephen Boyd
2019-11-14 18:35 ` [PATCH 02/12] drivers: irqchip: qcom-pdc: update max PDC interrupts Lina Iyer
2019-11-15 18:48   ` Stephen Boyd
2019-11-14 18:35 ` [PATCH 03/12] drivers: irqchip: pdc: Do not toggle IRQ_ENABLE during mask/unmask Lina Iyer
2019-11-15 18:49   ` Stephen Boyd
2019-11-14 18:35 ` [PATCH 04/12] drivers: irqchip: add PDC irqdomain for wakeup capable GPIOs Lina Iyer
2019-11-15 19:03   ` Stephen Boyd
2019-11-14 18:35 ` [PATCH 05/12] of: irq: document properties for wakeup interrupt parent Lina Iyer
2019-11-15 19:03   ` Stephen Boyd
2019-11-14 18:35 ` [PATCH 06/12] genirq: Introduce irq_chip_get/set_parent_state calls Lina Iyer
2019-11-15 19:04   ` Stephen Boyd
2019-11-14 18:35 ` [PATCH 07/12] drivers: irqchip: pdc: Add irqchip set/get state calls Lina Iyer
2019-11-15 19:05   ` Stephen Boyd
2019-11-14 18:35 ` [PATCH 08/12] drivers: pinctrl: msm: setup GPIO chip in hierarchy Lina Iyer
2019-11-14 18:43   ` Linus Walleij
2019-11-14 18:57     ` Lina Iyer
2019-11-15 19:33   ` Stephen Boyd
2019-11-15 20:55     ` Lina Iyer
2019-11-15 21:57       ` Lina Iyer
2019-11-15 22:09         ` Stephen Boyd
2019-11-15 22:13           ` Lina Iyer
2019-11-14 18:35 ` [PATCH 09/12] drivers: pinctrl: sdm845: add PDC wakeup interrupt map for GPIOs Lina Iyer
2019-11-15 19:33   ` Stephen Boyd
2019-11-14 18:35 ` [PATCH 10/12] arm64: dts: qcom: add PDC interrupt controller for SDM845 Lina Iyer
2019-11-15 19:34   ` Stephen Boyd
2019-11-14 18:35 ` [PATCH 11/12] arm64: dts: qcom: setup PDC as the wakeup parent for TLMM on SDM845 Lina Iyer
2019-11-15 19:34   ` Stephen Boyd
2019-11-14 18:35 ` [PATCH 12/12] arm64: defconfig: enable PDC interrupt controller for Qualcomm SDM845 Lina Iyer
2019-11-15 19:34   ` Stephen Boyd
2019-11-15 10:08 ` [PATCH 00/12] Support wakeup capable GPIOs Marc Zyngier
2019-11-15 16:20   ` Lina Iyer
2019-11-15 19:35 ` Stephen Boyd

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