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From: Greg Kurz <groug@kaod.org>
To: David Gibson <david@gibson.dropbear.id.au>
Cc: "Laurent Vivier" <lvivier@redhat.com>,
	qemu-ppc@nongnu.org,
	"Satheesh Rajendran" <sathnaga@linux.vnet.ibm.com>,
	"Cédric Le Goater" <clg@kaod.org>,
	qemu-devel@nongnu.org
Subject: [for-5.0 PATCH 2/4] xics: Don't deassert outputs
Date: Wed, 04 Dec 2019 20:43:43 +0100	[thread overview]
Message-ID: <157548862298.3650476.1228720391270249433.stgit@bahia.lan> (raw)
In-Reply-To: <157548861171.3650476.14824062174573272058.stgit@bahia.lan>

The correct way to do this is to deassert the input pins on the CPU side.
This is the case since a previous change.

Signed-off-by: Greg Kurz <groug@kaod.org>
---
 hw/intc/xics.c |    3 ---
 1 file changed, 3 deletions(-)

diff --git a/hw/intc/xics.c b/hw/intc/xics.c
index 0b259a09c545..1952009e6d22 100644
--- a/hw/intc/xics.c
+++ b/hw/intc/xics.c
@@ -289,9 +289,6 @@ void icp_reset(ICPState *icp)
     icp->pending_priority = 0xff;
     icp->mfrr = 0xff;
 
-    /* Make all outputs are deasserted */
-    qemu_set_irq(icp->output, 0);
-
     if (kvm_irqchip_in_kernel()) {
         Error *local_err = NULL;
 



  parent reply	other threads:[~2019-12-04 19:51 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-04 19:43 [for-5.0 PATCH 0/4] ppc: Fix interrupt controller emulation Greg Kurz
2019-12-04 19:43 ` [for-5.0 PATCH 1/4] ppc: Deassert the external interrupt pin in KVM on reset Greg Kurz
2019-12-04 19:43 ` Greg Kurz [this message]
2019-12-04 19:43 ` [for-5.0 PATCH 3/4] ppc: Don't use CPUPPCState::irq_input_state with modern Book3s CPU models Greg Kurz
2019-12-04 19:43 ` [for-5.0 PATCH 4/4] ppc: Ignore the CPU_INTERRUPT_EXITTB interrupt with KVM Greg Kurz
2019-12-09  1:14 ` [for-5.0 PATCH 0/4] ppc: Fix interrupt controller emulation David Gibson
2019-12-09 10:59   ` Greg Kurz
2019-12-09 11:07     ` Cornelia Huck
2019-12-09 11:14       ` Greg Kurz

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