From: Kevin Tang <kevin3.tang@gmail.com> To: airlied@linux.ie, daniel@ffwll.ch, robh+dt@kernel.org, mark.rutland@arm.com, kevin3.tang@gmail.com Cc: orsonzhai@gmail.com, baolin.wang@linaro.org, zhang.lyra@gmail.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: [PATCH RFC v1 3/6] dt-bindings: display: add Unisoc's dpu bindings Date: Mon, 16 Dec 2019 19:40:16 +0800 [thread overview] Message-ID: <1576496419-12409-4-git-send-email-kevin3.tang@gmail.com> (raw) In-Reply-To: <1576496419-12409-1-git-send-email-kevin3.tang@gmail.com> From: Kevin Tang <kevin.tang@unisoc.com> DPU (Display Processor Unit) is the Display Controller for the Unisoc SoCs which transfers the image data from a video memory buffer to an internal LCD interface. Cc: Orson Zhai <orsonzhai@gmail.com> Cc: Baolin Wang <baolin.wang@linaro.org> Cc: Chunyan Zhang <zhang.lyra@gmail.com> Signed-off-by: Kevin Tang <kevin.tang@unisoc.com> --- .../devicetree/bindings/display/sprd/dpu.yaml | 85 ++++++++++++++++++++++ 1 file changed, 85 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/sprd/dpu.yaml diff --git a/Documentation/devicetree/bindings/display/sprd/dpu.yaml b/Documentation/devicetree/bindings/display/sprd/dpu.yaml new file mode 100644 index 0000000..f84eddd --- /dev/null +++ b/Documentation/devicetree/bindings/display/sprd/dpu.yaml @@ -0,0 +1,85 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/sprd/dpu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Unisoc SoC Display Processor Unit (DPU) + +maintainers: + - David Airlie <airlied@linux.ie> + - Daniel Vetter <daniel@ffwll.ch> + - Rob Herring <robh+dt@kernel.org> + - Mark Rutland <mark.rutland@arm.com> + +description: | + DPU (Display Processor Unit) is the Display Controller for the Unisoc SoCs + which transfers the image data from a video memory buffer to an internal + LCD interface. + +properties: + compatible: + const: sprd,display-processor + + reg: + maxItems: 1 + description: + Physical base address and length of the DPU registers set + + interrupts: + maxItems: 1 + description: + The interrupt signal from DPU + + clocks: + minItems: 2 + + clock-names: + items: + - const: clk_src_128m + - const: clk_src_384m + + power-domains: + description: A phandle to DPU power domain node. + + iommus: + description: A phandle to DPU iommu node. + + port: + type: object + description: + A port node with endpoint definitions as defined in + Documentation/devicetree/bindings/media/video-interfaces.txt. + That port should be the output endpoint, usually output to + the associated DSI. + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - port + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/sprd,sc9860-clk.h> + dpu: dpu@0x63000000 { + compatible = "sprd,display-processor"; + reg = <0x0 0x63000000 0x0 0x1000>; + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "clk_src_128m", + "clk_src_384m"; + + clocks = <&pll CLK_TWPLL_128M>, + <&pll CLK_TWPLL_384M>; + + dpu_port: port { + dpu_out: endpoint { + remote-endpoint = <&dsi_in>; + }; + }; + }; -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Kevin Tang <kevin3.tang@gmail.com> To: airlied@linux.ie, daniel@ffwll.ch, robh+dt@kernel.org, mark.rutland@arm.com, kevin3.tang@gmail.com Cc: orsonzhai@gmail.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, zhang.lyra@gmail.com, baolin.wang@linaro.org Subject: [PATCH RFC v1 3/6] dt-bindings: display: add Unisoc's dpu bindings Date: Mon, 16 Dec 2019 19:40:16 +0800 [thread overview] Message-ID: <1576496419-12409-4-git-send-email-kevin3.tang@gmail.com> (raw) In-Reply-To: <1576496419-12409-1-git-send-email-kevin3.tang@gmail.com> From: Kevin Tang <kevin.tang@unisoc.com> DPU (Display Processor Unit) is the Display Controller for the Unisoc SoCs which transfers the image data from a video memory buffer to an internal LCD interface. Cc: Orson Zhai <orsonzhai@gmail.com> Cc: Baolin Wang <baolin.wang@linaro.org> Cc: Chunyan Zhang <zhang.lyra@gmail.com> Signed-off-by: Kevin Tang <kevin.tang@unisoc.com> --- .../devicetree/bindings/display/sprd/dpu.yaml | 85 ++++++++++++++++++++++ 1 file changed, 85 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/sprd/dpu.yaml diff --git a/Documentation/devicetree/bindings/display/sprd/dpu.yaml b/Documentation/devicetree/bindings/display/sprd/dpu.yaml new file mode 100644 index 0000000..f84eddd --- /dev/null +++ b/Documentation/devicetree/bindings/display/sprd/dpu.yaml @@ -0,0 +1,85 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/sprd/dpu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Unisoc SoC Display Processor Unit (DPU) + +maintainers: + - David Airlie <airlied@linux.ie> + - Daniel Vetter <daniel@ffwll.ch> + - Rob Herring <robh+dt@kernel.org> + - Mark Rutland <mark.rutland@arm.com> + +description: | + DPU (Display Processor Unit) is the Display Controller for the Unisoc SoCs + which transfers the image data from a video memory buffer to an internal + LCD interface. + +properties: + compatible: + const: sprd,display-processor + + reg: + maxItems: 1 + description: + Physical base address and length of the DPU registers set + + interrupts: + maxItems: 1 + description: + The interrupt signal from DPU + + clocks: + minItems: 2 + + clock-names: + items: + - const: clk_src_128m + - const: clk_src_384m + + power-domains: + description: A phandle to DPU power domain node. + + iommus: + description: A phandle to DPU iommu node. + + port: + type: object + description: + A port node with endpoint definitions as defined in + Documentation/devicetree/bindings/media/video-interfaces.txt. + That port should be the output endpoint, usually output to + the associated DSI. + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - port + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/sprd,sc9860-clk.h> + dpu: dpu@0x63000000 { + compatible = "sprd,display-processor"; + reg = <0x0 0x63000000 0x0 0x1000>; + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "clk_src_128m", + "clk_src_384m"; + + clocks = <&pll CLK_TWPLL_128M>, + <&pll CLK_TWPLL_384M>; + + dpu_port: port { + dpu_out: endpoint { + remote-endpoint = <&dsi_in>; + }; + }; + }; -- 2.7.4 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2019-12-16 11:41 UTC|newest] Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-12-16 11:40 [PATCH RFC v1 0/6] Add Unisoc's drm kms module Kevin Tang 2019-12-16 11:40 ` Kevin Tang 2019-12-16 11:40 ` [PATCH RFC v1 1/6] dt-bindings: display: add Unisoc's drm master bindings Kevin Tang 2019-12-16 11:40 ` Kevin Tang 2019-12-16 11:40 ` [PATCH RFC v1 2/6] drm/sprd: add Unisoc's drm kms master Kevin Tang 2019-12-16 11:40 ` Kevin Tang 2020-01-06 10:11 ` Thomas Zimmermann 2020-01-06 10:11 ` Thomas Zimmermann 2020-01-06 10:17 ` Thomas Zimmermann 2020-01-06 10:17 ` Thomas Zimmermann 2020-01-07 11:36 ` tang pengchuan 2020-01-07 12:22 ` Thomas Zimmermann 2020-01-07 12:22 ` Thomas Zimmermann 2020-01-14 14:05 ` tang pengchuan 2019-12-16 11:40 ` Kevin Tang [this message] 2019-12-16 11:40 ` [PATCH RFC v1 3/6] dt-bindings: display: add Unisoc's dpu bindings Kevin Tang 2019-12-16 11:40 ` [PATCH RFC v1 4/6] drm/sprd: add Unisoc's drm display controller driver Kevin Tang 2019-12-16 11:40 ` Kevin Tang 2019-12-16 11:40 ` [PATCH RFC v1 5/6] dt-bindings: display: add Unisoc's mipi dsi&dphy bindings Kevin Tang 2019-12-16 11:40 ` Kevin Tang 2019-12-16 11:40 ` [PATCH RFC v1 6/6] drm/sprd: add Unisoc's drm mipi dsi&dphy driver Kevin Tang 2019-12-16 11:40 ` Kevin Tang
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