[PATCH] x86/apic: mask IOAPIC entries when disable LAPIC

[Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>]

When system suspend to S1, LAPIC disabled via soft but some IOAPIC
entries are unmask like IOAPIC 0 pin 9 which is for acpi interrupt.
This state IOAPIC can response external interrupt, but the interrupt
message can not handled by LAPIC.

When wakeup system via keyboard/rtc, level triggered interrupt IOAPIC 0
pin 9 RTE's Remote IRR bit may be set to 1 but LAPIC does not send EOI
for it. So this Remote IRR bit will remain all the time. This cause the
following S1 suspend sequence failed because software lockup in
__synchronize_hardirq.

Mask IOAPIC entries when disable LAPIC to make IOAPIC completely quiet
when LAPIC disabled.

Signed-off-by: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
---
 arch/x86/kernel/apic/apic.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 28446fa..233239a 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -2626,6 +2626,12 @@ static int lapic_suspend(void)
 #endif
 
 	local_irq_save(flags);
+
+	/*
+	 * Make IOAPIC quiet before disable LAPIC
+	 */
+	mask_ioapic_entries();
+
 	disable_local_APIC();
 
 	irq_remapping_disable();
-- 
2.7.4