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From: Shawn Lin <shawn.lin@rock-chips.com>
To: Heiko Stuebner <heiko@sntech.de>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Rob Herring <robh+dt@kernel.org>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Bjorn Helgaas <bhelgaas@google.com>
Cc: Jingoo Han <jingoohan1@gmail.com>,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	William Wu <william.wu@rock-chips.com>,
	Simon Xue <xxm@rock-chips.com>,
	linux-rockchip@lists.infradead.org,
	Shawn Lin <shawn.lin@rock-chips.com>
Subject: [PATCH v2 0/6] Add Rockchip new PCIe controller and combo phy support
Date: Thu, 13 Feb 2020 14:08:05 +0800	[thread overview]
Message-ID: <1581574091-240890-1-git-send-email-shawn.lin@rock-chips.com> (raw)


Rockchip's new PCIe controller is based on DesignWare IP and the
combo phy is shard by PCIe and USB3.0 controller. This series adds
both of controller and phy drivers found on Rockchip RV1808 platform.


Changes in v2:
- fix yaml format
- add commit log and fix Kconfig
- remove dead code

Shawn Lin (3):
  dt-bindings: add binding for Rockchip combo phy using an Innosilicon
    IP
  PCI: dwc: Skip allocating own MSI domain if using external MSI domain
  MAINTAINERS: Update PCIe drivers for Rockchip

Simon Xue (2):
  dt-bindings: rockchip: Add DesignWare based PCIe controller
  PCI: rockchip: add DesignWare based PCIe controller

William Wu (1):
  phy/rockchip: inno-combophy: Add initial support

 .../devicetree/bindings/pci/rockchip-dw-pcie.yaml  |  148 +++
 .../bindings/phy/rockchip,inno-combophy.yaml       |   80 ++
 MAINTAINERS                                        |    4 +-
 drivers/pci/controller/Kconfig                     |    4 +-
 drivers/pci/controller/dwc/Kconfig                 |    9 +
 drivers/pci/controller/dwc/Makefile                |    1 +
 drivers/pci/controller/dwc/pcie-designware-host.c  |   10 +-
 drivers/pci/controller/dwc/pcie-designware.h       |    1 +
 drivers/pci/controller/dwc/pcie-dw-rockchip.c      |  439 ++++++++
 drivers/phy/rockchip/Kconfig                       |    8 +
 drivers/phy/rockchip/Makefile                      |    1 +
 drivers/phy/rockchip/phy-rockchip-inno-combphy.c   | 1056 ++++++++++++++++++++
 12 files changed, 1757 insertions(+), 4 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
 create mode 100644 Documentation/devicetree/bindings/phy/rockchip,inno-combophy.yaml
 create mode 100644 drivers/pci/controller/dwc/pcie-dw-rockchip.c
 create mode 100644 drivers/phy/rockchip/phy-rockchip-inno-combphy.c

-- 
1.9.1




             reply	other threads:[~2020-02-13  6:09 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-13  6:08 Shawn Lin [this message]
2020-02-13  6:08 ` [PATCH v2 1/6] dt-bindings: add binding for Rockchip combo phy using an Innosilicon IP Shawn Lin
2020-02-13 20:46   ` Rob Herring
2020-02-13 20:46     ` Rob Herring
2020-02-14  9:20   ` Heiko Stuebner
2020-02-14  9:20     ` Heiko Stuebner
2020-02-13  6:08 ` [PATCH v2 2/6] phy/rockchip: inno-combophy: Add initial support Shawn Lin
2020-02-13  6:08   ` Shawn Lin
2020-02-13  6:08 ` [PATCH v2 3/6] PCI: dwc: Skip allocating own MSI domain if using external MSI domain Shawn Lin
2020-02-13  6:08   ` Shawn Lin
2020-05-07 14:00   ` Rob Herring
2020-05-07 14:00     ` Rob Herring
2020-02-13  6:08 ` [PATCH v2 4/6] dt-bindings: rockchip: Add DesignWare based PCIe controller Shawn Lin
2020-02-13  6:08   ` Shawn Lin
2020-02-13 20:47   ` Rob Herring
2020-02-13 20:47     ` Rob Herring
2020-05-07 14:09   ` Rob Herring
2020-05-07 14:09     ` Rob Herring
2020-02-13  6:10 ` [PATCH v2 5/6] PCI: rockchip: add " Shawn Lin
2020-02-13  6:10   ` Shawn Lin
2020-02-13  6:10   ` [PATCH v2 6/6] MAINTAINERS: Update PCIe drivers for Rockchip Shawn Lin
2020-02-13  6:10     ` Shawn Lin
2020-05-07 15:36   ` [PATCH v2 5/6] PCI: rockchip: add DesignWare based PCIe controller Rob Herring

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