From: Jolly Shah <jolly.shah@xilinx.com> To: ard.biesheuvel@linaro.org, mingo@kernel.org, gregkh@linuxfoundation.org, matt@codeblueprint.co.uk, sudeep.holla@arm.com, hkallweit1@gmail.com, keescook@chromium.org, dmitry.torokhov@gmail.com, michal.simek@xilinx.com Cc: rajanv@xilinx.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Rajan Vaja <rajan.vaja@xilinx.com>, Jolly Shah <jolly.shah@xilinx.com> Subject: [PATCH v3 10/24] firmware: xilinx: Remove eemi ops for clock set/get parent Date: Fri, 6 Mar 2020 15:47:18 -0800 [thread overview] Message-ID: <1583538452-1992-11-git-send-email-jolly.shah@xilinx.com> (raw) In-Reply-To: <1583538452-1992-1-git-send-email-jolly.shah@xilinx.com> From: Rajan Vaja <rajan.vaja@xilinx.com> Use direct function call instead of eemi ops for clock set/get parent. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> --- drivers/clk/zynqmp/clk-mux-zynqmp.c | 6 ++---- drivers/firmware/xilinx/zynqmp.c | 8 ++++---- include/linux/firmware/xlnx-zynqmp.h | 4 ++-- 3 files changed, 8 insertions(+), 10 deletions(-) diff --git a/drivers/clk/zynqmp/clk-mux-zynqmp.c b/drivers/clk/zynqmp/clk-mux-zynqmp.c index 0af8f74..0619414 100644 --- a/drivers/clk/zynqmp/clk-mux-zynqmp.c +++ b/drivers/clk/zynqmp/clk-mux-zynqmp.c @@ -47,9 +47,8 @@ static u8 zynqmp_clk_mux_get_parent(struct clk_hw *hw) u32 clk_id = mux->clk_id; u32 val; int ret; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); - ret = eemi_ops->clock_getparent(clk_id, &val); + ret = zynqmp_pm_clock_getparent(clk_id, &val); if (ret) pr_warn_once("%s() getparent failed for clock: %s, ret = %d\n", @@ -71,9 +70,8 @@ static int zynqmp_clk_mux_set_parent(struct clk_hw *hw, u8 index) const char *clk_name = clk_hw_get_name(hw); u32 clk_id = mux->clk_id; int ret; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); - ret = eemi_ops->clock_setparent(clk_id, index); + ret = zynqmp_pm_clock_setparent(clk_id, index); if (ret) pr_warn_once("%s() set parent failed for clock: %s, ret = %d\n", diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 60a5675..563c77e 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -485,11 +485,12 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getrate); * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id) +int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id) { return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, clock_id, parent_id, 0, 0, NULL); } +EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent); /** * zynqmp_pm_clock_getparent() - Get the clock parent for given id @@ -501,7 +502,7 @@ static int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id) * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id) +int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id) { u32 ret_payload[PAYLOAD_ARG_CNT]; int ret; @@ -512,6 +513,7 @@ static int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id) return ret; } +EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent); /** * zynqmp_is_valid_ioctl() - Check whether IOCTL ID is valid or not @@ -718,8 +720,6 @@ static int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities, } static const struct zynqmp_eemi_ops eemi_ops = { - .clock_setparent = zynqmp_pm_clock_setparent, - .clock_getparent = zynqmp_pm_clock_getparent, .ioctl = zynqmp_pm_ioctl, .reset_assert = zynqmp_pm_reset_assert, .reset_get_status = zynqmp_pm_reset_get_status, diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 42dbdf3..f94cfa8 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -288,8 +288,6 @@ struct zynqmp_pm_query_data { struct zynqmp_eemi_ops { int (*fpga_load)(const u64 address, const u32 size, const u32 flags); int (*fpga_get_status)(u32 *value); - int (*clock_setparent)(u32 clock_id, u32 parent_id); - int (*clock_getparent)(u32 clock_id, u32 *parent_id); int (*ioctl)(u32 node_id, u32 ioctl_id, u32 arg1, u32 arg2, u32 *out); int (*reset_assert)(const enum zynqmp_pm_reset reset, const enum zynqmp_pm_reset_action assert_flag); @@ -317,6 +315,8 @@ int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider); int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider); int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate); int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate); +int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id); +int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id); int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1, u32 arg2, u32 arg3, u32 *ret_payload); -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Jolly Shah <jolly.shah@xilinx.com> To: ard.biesheuvel@linaro.org, mingo@kernel.org, gregkh@linuxfoundation.org, matt@codeblueprint.co.uk, sudeep.holla@arm.com, hkallweit1@gmail.com, keescook@chromium.org, dmitry.torokhov@gmail.com, michal.simek@xilinx.com Cc: Jolly Shah <jolly.shah@xilinx.com>, Rajan Vaja <rajan.vaja@xilinx.com>, rajanv@xilinx.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 10/24] firmware: xilinx: Remove eemi ops for clock set/get parent Date: Fri, 6 Mar 2020 15:47:18 -0800 [thread overview] Message-ID: <1583538452-1992-11-git-send-email-jolly.shah@xilinx.com> (raw) In-Reply-To: <1583538452-1992-1-git-send-email-jolly.shah@xilinx.com> From: Rajan Vaja <rajan.vaja@xilinx.com> Use direct function call instead of eemi ops for clock set/get parent. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> --- drivers/clk/zynqmp/clk-mux-zynqmp.c | 6 ++---- drivers/firmware/xilinx/zynqmp.c | 8 ++++---- include/linux/firmware/xlnx-zynqmp.h | 4 ++-- 3 files changed, 8 insertions(+), 10 deletions(-) diff --git a/drivers/clk/zynqmp/clk-mux-zynqmp.c b/drivers/clk/zynqmp/clk-mux-zynqmp.c index 0af8f74..0619414 100644 --- a/drivers/clk/zynqmp/clk-mux-zynqmp.c +++ b/drivers/clk/zynqmp/clk-mux-zynqmp.c @@ -47,9 +47,8 @@ static u8 zynqmp_clk_mux_get_parent(struct clk_hw *hw) u32 clk_id = mux->clk_id; u32 val; int ret; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); - ret = eemi_ops->clock_getparent(clk_id, &val); + ret = zynqmp_pm_clock_getparent(clk_id, &val); if (ret) pr_warn_once("%s() getparent failed for clock: %s, ret = %d\n", @@ -71,9 +70,8 @@ static int zynqmp_clk_mux_set_parent(struct clk_hw *hw, u8 index) const char *clk_name = clk_hw_get_name(hw); u32 clk_id = mux->clk_id; int ret; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); - ret = eemi_ops->clock_setparent(clk_id, index); + ret = zynqmp_pm_clock_setparent(clk_id, index); if (ret) pr_warn_once("%s() set parent failed for clock: %s, ret = %d\n", diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 60a5675..563c77e 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -485,11 +485,12 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getrate); * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id) +int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id) { return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, clock_id, parent_id, 0, 0, NULL); } +EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent); /** * zynqmp_pm_clock_getparent() - Get the clock parent for given id @@ -501,7 +502,7 @@ static int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id) * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id) +int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id) { u32 ret_payload[PAYLOAD_ARG_CNT]; int ret; @@ -512,6 +513,7 @@ static int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id) return ret; } +EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent); /** * zynqmp_is_valid_ioctl() - Check whether IOCTL ID is valid or not @@ -718,8 +720,6 @@ static int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities, } static const struct zynqmp_eemi_ops eemi_ops = { - .clock_setparent = zynqmp_pm_clock_setparent, - .clock_getparent = zynqmp_pm_clock_getparent, .ioctl = zynqmp_pm_ioctl, .reset_assert = zynqmp_pm_reset_assert, .reset_get_status = zynqmp_pm_reset_get_status, diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 42dbdf3..f94cfa8 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -288,8 +288,6 @@ struct zynqmp_pm_query_data { struct zynqmp_eemi_ops { int (*fpga_load)(const u64 address, const u32 size, const u32 flags); int (*fpga_get_status)(u32 *value); - int (*clock_setparent)(u32 clock_id, u32 parent_id); - int (*clock_getparent)(u32 clock_id, u32 *parent_id); int (*ioctl)(u32 node_id, u32 ioctl_id, u32 arg1, u32 arg2, u32 *out); int (*reset_assert)(const enum zynqmp_pm_reset reset, const enum zynqmp_pm_reset_action assert_flag); @@ -317,6 +315,8 @@ int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider); int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider); int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate); int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate); +int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id); +int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id); int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1, u32 arg2, u32 arg3, u32 *ret_payload); -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-03-06 23:48 UTC|newest] Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-03-06 23:47 [PATCH v3 00/24] firmware: xilinx: Add xilinx specific sysfs interface Jolly Shah 2020-03-06 23:47 ` Jolly Shah 2020-03-06 23:47 ` [PATCH v3 01/24] firmware: xilinx: Remove eemi ops for get_api_version Jolly Shah 2020-03-06 23:47 ` Jolly Shah 2020-03-06 23:47 ` [PATCH v3 02/24] firmware: xilinx: Remove eemi ops for get_chipid Jolly Shah 2020-03-06 23:47 ` Jolly Shah 2020-03-06 23:47 ` [PATCH v3 03/24] firmware: xilinx: Remove eemi ops for query_data Jolly Shah 2020-03-06 23:47 ` Jolly Shah 2020-03-06 23:47 ` [PATCH v3 04/24] firmware: xilinx: Remove eemi ops for clock_enable Jolly Shah 2020-03-06 23:47 ` Jolly Shah 2020-03-06 23:47 ` [PATCH v3 05/24] firmware: xilinx: Remove eemi ops for clock_disable Jolly Shah 2020-03-06 23:47 ` Jolly Shah 2020-03-06 23:47 ` [PATCH v3 06/24] firmware: xilinx: Remove eemi ops for clock_getstate Jolly Shah 2020-03-06 23:47 ` Jolly Shah 2020-03-06 23:47 ` [PATCH v3 07/24] firmware: xilinx: Remove eemi ops for clock_setdivider Jolly Shah 2020-03-06 23:47 ` Jolly Shah 2020-03-06 23:47 ` [PATCH v3 08/24] firmware: xilinx: Remove eemi ops for clock_getdivider Jolly Shah 2020-03-06 23:47 ` Jolly Shah 2020-03-06 23:47 ` [PATCH v3 09/24] firmware: xilinx: Remove eemi ops for clock set/get rate Jolly Shah 2020-03-06 23:47 ` Jolly Shah 2020-03-06 23:47 ` Jolly Shah [this message] 2020-03-06 23:47 ` [PATCH v3 10/24] firmware: xilinx: Remove eemi ops for clock set/get parent Jolly Shah 2020-03-06 23:47 ` [PATCH v3 11/24] firmware: xilinx: Use APIs instead of IOCTLs Jolly Shah 2020-03-06 23:47 ` Jolly Shah 2020-03-06 23:47 ` [PATCH v3 12/24] firmware: xilinx: Remove eemi ops for reset_assert Jolly Shah 2020-03-06 23:47 ` Jolly Shah 2020-03-06 23:47 ` [PATCH v3 13/24] firmware: xilinx: Remove eemi ops for reset_get_status Jolly Shah 2020-03-06 23:47 ` Jolly Shah 2020-03-06 23:47 ` [PATCH v3 14/24] firmware: xilinx: Remove eemi ops for init_finalize Jolly Shah 2020-03-06 23:47 ` Jolly Shah 2020-03-06 23:47 ` [PATCH v3 15/24] firmware: xilinx: Remove eemi ops for set_suspend_mode Jolly Shah 2020-03-06 23:47 ` Jolly Shah 2020-03-06 23:47 ` [PATCH v3 16/24] firmware: xilinx: Remove eemi ops for request_node Jolly Shah 2020-03-06 23:47 ` Jolly Shah 2020-03-06 23:47 ` [PATCH v3 17/24] firmware: xilinx: Remove eemi ops for release_node Jolly Shah 2020-03-06 23:47 ` Jolly Shah 2020-03-06 23:47 ` [PATCH v3 18/24] firmware: xilinx: Remove eemi ops for set_requirement Jolly Shah 2020-03-06 23:47 ` Jolly Shah 2020-03-06 23:47 ` [PATCH v3 19/24] firmware: xilinx: Remove eemi ops for fpga related APIs Jolly Shah 2020-03-06 23:47 ` Jolly Shah 2020-03-06 23:47 ` [PATCH v3 20/24] firmware: xilinx: Add APIs to read/write GGS/PGGS registers Jolly Shah 2020-03-06 23:47 ` Jolly Shah 2020-03-18 11:51 ` Greg KH 2020-03-18 11:51 ` Greg KH 2020-03-18 12:41 ` Rajan Vaja 2020-03-18 12:41 ` Rajan Vaja 2020-03-18 12:50 ` Greg KH 2020-03-18 12:50 ` Greg KH 2020-03-06 23:47 ` [PATCH v3 21/24] firmware: xilinx: Add sysfs interface Jolly Shah 2020-03-06 23:47 ` Jolly Shah 2020-03-18 11:51 ` Greg KH 2020-03-18 11:51 ` Greg KH 2020-03-06 23:47 ` [PATCH v3 22/24] firmware: xilinx: Add system shutdown API interface Jolly Shah 2020-03-06 23:47 ` Jolly Shah 2020-03-18 11:52 ` Greg KH 2020-03-18 11:52 ` Greg KH 2020-03-06 23:47 ` [PATCH v3 23/24] firmware: xilinx: Add sysfs to set shutdown scope Jolly Shah 2020-03-06 23:47 ` Jolly Shah 2020-03-18 11:53 ` Greg KH 2020-03-18 11:53 ` Greg KH 2020-03-06 23:47 ` [PATCH v3 24/24] firmware: xilinx: Add sysfs and API to set boot health status Jolly Shah 2020-03-06 23:47 ` Jolly Shah 2020-03-18 11:53 ` Greg KH 2020-03-18 11:53 ` Greg KH 2020-03-18 11:54 ` [PATCH v3 00/24] firmware: xilinx: Add xilinx specific sysfs interface Greg KH 2020-03-18 11:54 ` Greg KH 2020-04-09 19:17 ` Jolly Shah 2020-04-09 19:17 ` Jolly Shah
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