From: Amit Daniel Kachhap <amit.kachhap@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: Mark Rutland <mark.rutland@arm.com>,
Kees Cook <keescook@chromium.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Kristina Martsenko <kristina.martsenko@arm.com>,
Dave Martin <Dave.Martin@arm.com>,
Mark Brown <broonie@kernel.org>,
James Morse <james.morse@arm.com>,
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>,
Amit Daniel Kachhap <amit.kachhap@arm.com>,
Vincenzo Frascino <Vincenzo.Frascino@arm.com>,
Will Deacon <will@kernel.org>, Ard Biesheuvel <ardb@kernel.org>
Subject: [PATCH v7 05/17] arm64: ptrauth: Add bootup/runtime flags for __cpu_setup
Date: Fri, 13 Mar 2020 14:34:52 +0530 [thread overview]
Message-ID: <1584090304-18043-6-git-send-email-amit.kachhap@arm.com> (raw)
In-Reply-To: <1584090304-18043-1-git-send-email-amit.kachhap@arm.com>
This patch allows __cpu_setup to be invoked with one of these flags,
ARM64_CPU_BOOT_PRIMARY, ARM64_CPU_BOOT_SECONDARY or ARM64_CPU_RUNTIME.
This is required as some cpufeatures need different handling during
different scenarios.
The input parameter in x0 is preserved till the end to be used inside
this function.
There should be no functional change with this patch and is useful
for the subsequent ptrauth patch which utilizes it. Some upcoming
arm cpufeatures can also utilize these flags.
Suggested-by: James Morse <james.morse@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: James Morse <james.morse@arm.com>
Reviewed-by: Vincenzo Frascino <Vincenzo.Frascino@arm.com>
Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
---
Changes since v6:
- Added more description as asked by Vincenzo.
arch/arm64/include/asm/smp.h | 8 ++++++++
arch/arm64/kernel/head.S | 2 ++
arch/arm64/kernel/sleep.S | 2 ++
arch/arm64/mm/proc.S | 26 +++++++++++++++-----------
4 files changed, 27 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/include/asm/smp.h b/arch/arm64/include/asm/smp.h
index a0c8a0b..79bc5742 100644
--- a/arch/arm64/include/asm/smp.h
+++ b/arch/arm64/include/asm/smp.h
@@ -23,6 +23,14 @@
#define CPU_STUCK_REASON_52_BIT_VA (UL(1) << CPU_STUCK_REASON_SHIFT)
#define CPU_STUCK_REASON_NO_GRAN (UL(2) << CPU_STUCK_REASON_SHIFT)
+/* Possible options for __cpu_setup */
+/* Option to setup primary cpu */
+#define ARM64_CPU_BOOT_PRIMARY (1)
+/* Option to setup secondary cpus */
+#define ARM64_CPU_BOOT_SECONDARY (2)
+/* Option to setup cpus for different cpu run time services */
+#define ARM64_CPU_RUNTIME (3)
+
#ifndef __ASSEMBLY__
#include <asm/percpu.h>
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 989b194..797573f 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -118,6 +118,7 @@ ENTRY(stext)
* On return, the CPU will be ready for the MMU to be turned on and
* the TCR will have been set.
*/
+ mov x0, #ARM64_CPU_BOOT_PRIMARY
bl __cpu_setup // initialise processor
b __primary_switch
ENDPROC(stext)
@@ -712,6 +713,7 @@ secondary_startup:
* Common entry point for secondary CPUs.
*/
bl __cpu_secondary_check52bitva
+ mov x0, #ARM64_CPU_BOOT_SECONDARY
bl __cpu_setup // initialise processor
adrp x1, swapper_pg_dir
bl __enable_mmu
diff --git a/arch/arm64/kernel/sleep.S b/arch/arm64/kernel/sleep.S
index f5b04dd..7b2f2e6 100644
--- a/arch/arm64/kernel/sleep.S
+++ b/arch/arm64/kernel/sleep.S
@@ -3,6 +3,7 @@
#include <linux/linkage.h>
#include <asm/asm-offsets.h>
#include <asm/assembler.h>
+#include <asm/smp.h>
.text
/*
@@ -99,6 +100,7 @@ ENDPROC(__cpu_suspend_enter)
.pushsection ".idmap.text", "awx"
ENTRY(cpu_resume)
bl el2_setup // if in EL2 drop to EL1 cleanly
+ mov x0, #ARM64_CPU_RUNTIME
bl __cpu_setup
/* enable the MMU early - so we can access sleep_save_stash by va */
adrp x1, swapper_pg_dir
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
index aafed69..ea0db17 100644
--- a/arch/arm64/mm/proc.S
+++ b/arch/arm64/mm/proc.S
@@ -408,31 +408,31 @@ SYM_FUNC_END(idmap_kpti_install_ng_mappings)
/*
* __cpu_setup
*
- * Initialise the processor for turning the MMU on. Return in x0 the
- * value of the SCTLR_EL1 register.
+ * Initialise the processor for turning the MMU on.
+ *
+ * Input:
+ * x0 with a flag ARM64_CPU_BOOT_PRIMARY/ARM64_CPU_BOOT_SECONDARY/ARM64_CPU_RUNTIME.
+ * Output:
+ * Return in x0 the value of the SCTLR_EL1 register.
*/
.pushsection ".idmap.text", "awx"
SYM_FUNC_START(__cpu_setup)
tlbi vmalle1 // Invalidate local TLB
dsb nsh
- mov x0, #3 << 20
- msr cpacr_el1, x0 // Enable FP/ASIMD
- mov x0, #1 << 12 // Reset mdscr_el1 and disable
- msr mdscr_el1, x0 // access to the DCC from EL0
+ mov x1, #3 << 20
+ msr cpacr_el1, x1 // Enable FP/ASIMD
+ mov x1, #1 << 12 // Reset mdscr_el1 and disable
+ msr mdscr_el1, x1 // access to the DCC from EL0
isb // Unmask debug exceptions now,
enable_dbg // since this is per-cpu
- reset_pmuserenr_el0 x0 // Disable PMU access from EL0
+ reset_pmuserenr_el0 x1 // Disable PMU access from EL0
/*
* Memory region attributes
*/
mov_q x5, MAIR_EL1_SET
msr mair_el1, x5
/*
- * Prepare SCTLR
- */
- mov_q x0, SCTLR_EL1_SET
- /*
* Set/prepare TCR and TTBR. We use 512GB (39-bit) address range for
* both user and kernel.
*/
@@ -468,5 +468,9 @@ SYM_FUNC_START(__cpu_setup)
1:
#endif /* CONFIG_ARM64_HW_AFDBM */
msr tcr_el1, x10
+ /*
+ * Prepare SCTLR
+ */
+ mov_q x0, SCTLR_EL1_SET
ret // return to head.S
SYM_FUNC_END(__cpu_setup)
--
2.7.4
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next prev parent reply other threads:[~2020-03-13 9:07 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-13 9:04 [PATCH v7 00/17] arm64: return address signing Amit Daniel Kachhap
2020-03-13 9:04 ` [PATCH v7 01/17] arm64: cpufeature: Fix meta-capability cpufeature check Amit Daniel Kachhap
2020-03-13 9:04 ` [PATCH v7 02/17] arm64: cpufeature: add pointer auth meta-capabilities Amit Daniel Kachhap
2020-03-13 9:04 ` [PATCH v7 03/17] arm64: rename ptrauth key structures to be user-specific Amit Daniel Kachhap
2020-03-13 9:04 ` [PATCH v7 04/17] arm64: install user ptrauth keys at kernel exit time Amit Daniel Kachhap
2020-03-13 9:04 ` Amit Daniel Kachhap [this message]
2020-03-13 9:04 ` [PATCH v7 06/17] arm64: cpufeature: Move cpu capability helpers inside C file Amit Daniel Kachhap
2020-03-13 9:04 ` [PATCH v7 07/17] arm64: cpufeature: handle conflicts based on capability Amit Daniel Kachhap
2020-03-13 9:04 ` [PATCH v7 08/17] arm64: enable ptrauth earlier Amit Daniel Kachhap
2020-03-13 9:04 ` [PATCH v7 09/17] arm64: initialize and switch ptrauth kernel keys Amit Daniel Kachhap
2020-03-13 9:04 ` [PATCH v7 10/17] arm64: initialize ptrauth keys for kernel booting task Amit Daniel Kachhap
2020-03-13 9:04 ` [PATCH v7 11/17] arm64: mask PAC bits of __builtin_return_address Amit Daniel Kachhap
2020-03-13 9:04 ` [PATCH v7 12/17] arm64: unwind: strip PAC from kernel addresses Amit Daniel Kachhap
2020-03-13 9:05 ` [PATCH v7 13/17] arm64: __show_regs: strip PAC from lr in printk Amit Daniel Kachhap
2020-03-13 9:05 ` [PATCH v7 14/17] arm64: suspend: restore the kernel ptrauth keys Amit Daniel Kachhap
2020-03-13 9:05 ` [PATCH v7 15/17] kconfig: Add support for 'as-option' Amit Daniel Kachhap
2020-03-13 9:05 ` Amit Daniel Kachhap
2020-03-13 9:10 ` Masahiro Yamada
2020-03-13 9:10 ` Masahiro Yamada
2020-03-13 9:14 ` Amit Kachhap
2020-03-13 9:14 ` Amit Kachhap
2020-03-13 9:05 ` [PATCH v7 16/17] arm64: compile the kernel with ptrauth return address signing Amit Daniel Kachhap
2020-03-19 18:19 ` [PATCH] arm64: Kconfig: verify binutils support for ARM64_PTR_AUTH Nick Desaulniers
2020-03-19 18:35 ` Nathan Chancellor
2020-03-20 15:09 ` Catalin Marinas
2020-03-13 9:05 ` [PATCH v7 17/17] lkdtm: arm64: test kernel pointer authentication Amit Daniel Kachhap
2020-03-18 14:32 ` [PATCH v7 00/17] arm64: return address signing Catalin Marinas
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