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From: Sharat Masetty <smasetty@codeaurora.org>
To: freedreno@lists.freedesktop.org, devicetree@vger.kernel.org
Cc: dri-devel@freedesktop.org, linux-arm-msm@vger.kernel.org,
	linux-kernel@vger.kernel.org, mka@chromium.org,
	dianders@chromium.org, robh@kernel.org, robin.murphy@arm.com,
	saiprakash.ranjan@codeaurora.org, jcrouse@codeaurora.org,
	Sharat Masetty <smasetty@codeaurora.org>
Subject: [PATCH v2] dt-bindings: arm-smmu: Add sc7180 compatible string and mem_iface clock
Date: Thu, 30 Apr 2020 09:29:47 +0530	[thread overview]
Message-ID: <1588219187-19295-1-git-send-email-smasetty@codeaurora.org> (raw)

This patch adds a new compatible string for sc7180 and also an
additional clock listing needed to power the TBUs and the TCU.

Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
---
v2: Addressed review comments from Doug

 Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index 6515dbe..ba5dba4 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -28,6 +28,7 @@ properties:
           - enum:
               - qcom,msm8996-smmu-v2
               - qcom,msm8998-smmu-v2
+              - qcom,sc7180-smmu-v2
               - qcom,sdm845-smmu-v2
           - const: qcom,smmu-v2

@@ -113,16 +114,23 @@ properties:
       present in such cases.

   clock-names:
+    minItems: 2
+    maxItems: 3
     items:
       - const: bus
       - const: iface
+      - const: mem_iface

   clocks:
+    minItems: 2
+    maxItems: 3
     items:
       - description: bus clock required for downstream bus access and for the
           smmu ptw
       - description: interface clock required to access smmu's registers
           through the TCU's programming interface.
+      - description: clock required for the inner working of SMMU TBUs and the
+          TCU like the pagetable walks and the TLB flushes.

   power-domains:
     maxItems: 1
--
1.9.1

WARNING: multiple messages have this Message-ID (diff)
From: Sharat Masetty <smasetty@codeaurora.org>
To: freedreno@lists.freedesktop.org, devicetree@vger.kernel.org
Cc: saiprakash.ranjan@codeaurora.org, linux-arm-msm@vger.kernel.org,
	Sharat Masetty <smasetty@codeaurora.org>,
	dianders@chromium.org, linux-kernel@vger.kernel.org,
	mka@chromium.org, dri-devel@freedesktop.org,
	robin.murphy@arm.com
Subject: [PATCH v2] dt-bindings: arm-smmu: Add sc7180 compatible string and mem_iface clock
Date: Thu, 30 Apr 2020 09:29:47 +0530	[thread overview]
Message-ID: <1588219187-19295-1-git-send-email-smasetty@codeaurora.org> (raw)

This patch adds a new compatible string for sc7180 and also an
additional clock listing needed to power the TBUs and the TCU.

Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
---
v2: Addressed review comments from Doug

 Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index 6515dbe..ba5dba4 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -28,6 +28,7 @@ properties:
           - enum:
               - qcom,msm8996-smmu-v2
               - qcom,msm8998-smmu-v2
+              - qcom,sc7180-smmu-v2
               - qcom,sdm845-smmu-v2
           - const: qcom,smmu-v2

@@ -113,16 +114,23 @@ properties:
       present in such cases.

   clock-names:
+    minItems: 2
+    maxItems: 3
     items:
       - const: bus
       - const: iface
+      - const: mem_iface

   clocks:
+    minItems: 2
+    maxItems: 3
     items:
       - description: bus clock required for downstream bus access and for the
           smmu ptw
       - description: interface clock required to access smmu's registers
           through the TCU's programming interface.
+      - description: clock required for the inner working of SMMU TBUs and the
+          TCU like the pagetable walks and the TLB flushes.

   power-domains:
     maxItems: 1
--
1.9.1
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             reply	other threads:[~2020-04-30  4:00 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-30  3:59 Sharat Masetty [this message]
2020-04-30  3:59 ` [PATCH v2] dt-bindings: arm-smmu: Add sc7180 compatible string and mem_iface clock Sharat Masetty
2020-04-30 18:12 ` Jordan Crouse
2020-04-30 18:12   ` Jordan Crouse
2020-04-30 18:21   ` Doug Anderson
2020-04-30 18:21     ` Doug Anderson
2020-05-01  8:08     ` [Freedreno] " Sharat Masetty
2020-05-01  8:08       ` Sharat Masetty

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