[PATCH v5 8/8] spi: flags 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX' can't be coexit with 'SPI_3WIRE' mode

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From: dillon.minfei@gmail.com
To: linus.walleij@linaro.org, broonie@kernel.org
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
	linux-stm32@st-md-mailman.stormreply.com,
	dri-devel@lists.freedesktop.org, linux-clk@vger.kernel.org,
	dillon min <dillon.minfei@gmail.com>
Subject: [PATCH v5 8/8] spi: flags 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX' can't be coexit with 'SPI_3WIRE' mode
Date: Mon, 25 May 2020 11:45:48 +0800	[thread overview]
Message-ID: <1590378348-8115-9-git-send-email-dillon.minfei@gmail.com> (raw)
In-Reply-To: <1590378348-8115-1-git-send-email-dillon.minfei@gmail.com>

From: dillon min <dillon.minfei@gmail.com>

since chip spi driver need get the transfer direction by 'tx_buf' and
'rx_buf' of 'struct spi_transfer' in 'SPI_3WIRE' mode.

so, we need bypass 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX'
feature in 'SPI_3WIRE' mode

Signed-off-by: dillon min <dillon.minfei@gmail.com>
---
 drivers/spi/spi.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index c92c894..f884411 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -1023,7 +1023,8 @@ static int spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg)
 	void *tmp;
 	unsigned int max_tx, max_rx;
 
-	if (ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX)) {
+	if ((ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX))
+		&& !(msg->spi->mode & SPI_3WIRE)) {
 		max_tx = 0;
 		max_rx = 0;
 
-- 
2.7.4

WARNING: multiple messages have this Message-ID (diff)

From: dillon.minfei@gmail.com
To: linus.walleij@linaro.org, broonie@kernel.org
Cc: devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-spi@vger.kernel.org, dillon min <dillon.minfei@gmail.com>,
	linux-stm32@st-md-mailman.stormreply.com,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 8/8] spi: flags 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX' can't be coexit with 'SPI_3WIRE' mode
Date: Mon, 25 May 2020 11:45:48 +0800	[thread overview]
Message-ID: <1590378348-8115-9-git-send-email-dillon.minfei@gmail.com> (raw)
In-Reply-To: <1590378348-8115-1-git-send-email-dillon.minfei@gmail.com>

From: dillon min <dillon.minfei@gmail.com>

since chip spi driver need get the transfer direction by 'tx_buf' and
'rx_buf' of 'struct spi_transfer' in 'SPI_3WIRE' mode.

so, we need bypass 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX'
feature in 'SPI_3WIRE' mode

Signed-off-by: dillon min <dillon.minfei@gmail.com>
---
 drivers/spi/spi.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index c92c894..f884411 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -1023,7 +1023,8 @@ static int spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg)
 	void *tmp;
 	unsigned int max_tx, max_rx;
 
-	if (ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX)) {
+	if ((ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX))
+		&& !(msg->spi->mode & SPI_3WIRE)) {
 		max_tx = 0;
 		max_rx = 0;
 
-- 
2.7.4


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)

From: dillon.minfei@gmail.com
To: linus.walleij@linaro.org, broonie@kernel.org
Cc: devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-spi@vger.kernel.org, dillon min <dillon.minfei@gmail.com>,
	linux-stm32@st-md-mailman.stormreply.com,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 8/8] spi: flags 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX' can't be coexit with 'SPI_3WIRE' mode
Date: Mon, 25 May 2020 11:45:48 +0800	[thread overview]
Message-ID: <1590378348-8115-9-git-send-email-dillon.minfei@gmail.com> (raw)
In-Reply-To: <1590378348-8115-1-git-send-email-dillon.minfei@gmail.com>

From: dillon min <dillon.minfei@gmail.com>

since chip spi driver need get the transfer direction by 'tx_buf' and
'rx_buf' of 'struct spi_transfer' in 'SPI_3WIRE' mode.

so, we need bypass 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX'
feature in 'SPI_3WIRE' mode

Signed-off-by: dillon min <dillon.minfei@gmail.com>
---
 drivers/spi/spi.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index c92c894..f884411 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -1023,7 +1023,8 @@ static int spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg)
 	void *tmp;
 	unsigned int max_tx, max_rx;
 
-	if (ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX)) {
+	if ((ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX))
+		&& !(msg->spi->mode & SPI_3WIRE)) {
 		max_tx = 0;
 		max_rx = 0;
 
-- 
2.7.4

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

next prev parent reply	other threads:[~2020-05-25  3:46 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-25  3:45 [PATCH v5 0/8] Enable ili9341 and l3gd20 on stm32f429-disco dillon.minfei
2020-05-25  3:45 ` dillon.minfei
2020-05-25  3:45 ` dillon.minfei
2020-05-25  3:45 ` [PATCH v5 1/8] ARM: dts: stm32: Add dma config for spi5 dillon.minfei
2020-05-25  3:45   ` dillon.minfei
2020-05-25  3:45   ` dillon.minfei
2020-05-25  3:45 ` [PATCH v5 2/8] ARM: dts: stm32: Add pin map for ltdc & spi5 on stm32f429-disco board dillon.minfei
2020-05-25  3:45   ` dillon.minfei
2020-05-25  3:45   ` dillon.minfei
2020-05-25  3:45 ` [PATCH v5 3/8] ARM: dts: stm32: enable ltdc binding with ili9341, gyro l3gd20 on stm32429-disco board dillon.minfei
2020-05-25  3:45   ` dillon.minfei
2020-05-25  3:45   ` dillon.minfei
2020-05-25  3:45 ` [PATCH v5 4/8] dt-bindings: display: panel: Add ilitek ili9341 panel bindings dillon.minfei
2020-05-25  3:45   ` dillon.minfei
2020-05-25  3:45   ` dillon.minfei
2020-05-25 12:20   ` Linus Walleij
2020-05-25 12:20     ` Linus Walleij
2020-05-25 12:20     ` Linus Walleij
2020-05-25  3:45 ` [PATCH v5 5/8] clk: stm32: Fix stm32f429's ltdc driver hang in set clock rate, fix duplicated ltdc clock register to 'clk_core' case ltdc's clock turn off by clk_disable_unused() dillon.minfei
2020-05-25  3:45   ` dillon.minfei
2020-05-25  3:45   ` dillon.minfei
2020-05-27  1:44   ` Stephen Boyd
2020-05-27  1:44     ` Stephen Boyd
2020-05-27  1:44     ` Stephen Boyd
2020-05-27  3:30     ` dillon min
2020-05-27  3:30       ` dillon min
2020-05-27  3:30       ` dillon min
2020-05-27  6:40       ` Stephen Boyd
2020-05-25  3:45 ` [PATCH v5 6/8] drm/panel: Add ilitek ili9341 panel driver dillon.minfei
2020-05-25  3:45   ` dillon.minfei
2020-05-25  3:45   ` dillon.minfei
2020-05-25 12:23   ` Linus Walleij
2020-05-25 12:23     ` Linus Walleij
2020-05-25 12:23     ` Linus Walleij
2020-05-26  7:46   ` Andy Shevchenko
2020-05-26  7:46     ` Andy Shevchenko
2020-05-26  7:46     ` Andy Shevchenko
2020-05-26  9:08     ` dillon min
2020-05-26  9:08       ` dillon min
2020-05-26  9:08       ` dillon min
2020-05-26 10:38       ` Noralf Trønnes
2020-05-26 10:38         ` Noralf Trønnes
2020-05-26 10:38         ` Noralf Trønnes
2020-06-30 15:32         ` dillon min
2020-06-30 15:32           ` dillon min
2020-06-30 15:32           ` dillon min
2020-05-25  3:45 ` [PATCH v5 7/8] spi: stm32: Add 'SPI_SIMPLEX_RX', 'SPI_3WIRE_RX' support for stm32f4 dillon.minfei
2020-05-25  3:45   ` dillon.minfei
2020-05-25  3:45   ` dillon.minfei
2020-05-25  3:45 ` dillon.minfei [this message]
2020-05-25  3:45   ` [PATCH v5 8/8] spi: flags 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX' can't be coexit with 'SPI_3WIRE' mode dillon.minfei
2020-05-25  3:45   ` dillon.minfei
2020-05-26  9:19 ` [PATCH v5 0/8] Enable ili9341 and l3gd20 on stm32f429-disco Mark Brown
2020-05-26  9:19   ` Mark Brown
2020-05-26  9:19   ` Mark Brown
     [not found] <broonie@kernel.org>
2020-05-25  3:40 ` dillon.minfei
2020-05-25  3:41   ` [PATCH v5 8/8] spi: flags 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX' can't be coexit with 'SPI_3WIRE' mode dillon.minfei
2020-05-25  3:41     ` dillon.minfei
2020-05-25  3:41     ` dillon.minfei

find likely ancestor, descendant, or conflicting patches for this message:
dfblob:c92c894 dfblob:c92c894 dfblob:c92c894 dfblob:f884411
dfblob:f884411 dfblob:f884411
	(help)

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