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From: <derek.fang@realtek.com>
To: <broonie@kernel.org>, <lgirdwood@gmail.com>
Cc: oder_chiou@realtek.com, jack.yu@realtek.com,
	alsa-devel@alsa-project.org, lars@metafoo.de,
	albertchen@realtek.com, derek.fang@realtek.com,
	shumingf@realtek.com, flove@realtek.com
Subject: [PATCH 5/5] ASoC: rt5682: Let dai clks be registered whether mclk exists or not
Date: Fri, 12 Jun 2020 13:15:25 +0800	[thread overview]
Message-ID: <1591938925-1070-5-git-send-email-derek.fang@realtek.com> (raw)
In-Reply-To: <1591938925-1070-1-git-send-email-derek.fang@realtek.com>

From: "derek.fang" <derek.fang@realtek.com>

According to ideal rt5682 CCF, the root clk is mclk.
But in some platforms, mclk is not exported to CCF.
In this condition, rt5682_register_dai_clks will not be called.
This patch lets dai clks could be registered whether mclk exists or not.

Signed-off-by: derek.fang <derek.fang@realtek.com>
---
 sound/soc/codecs/rt5682.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/sound/soc/codecs/rt5682.c b/sound/soc/codecs/rt5682.c
index f9d8d8c..ff6a5bb 100644
--- a/sound/soc/codecs/rt5682.c
+++ b/sound/soc/codecs/rt5682.c
@@ -2859,12 +2859,13 @@ static int rt5682_probe(struct snd_soc_component *component)
 				return ret;
 			}
 			rt5682->mclk = NULL;
-		} else {
-			/* Register CCF DAI clock control */
-			ret = rt5682_register_dai_clks(component);
-			if (ret)
-				return ret;
 		}
+
+		/* Register CCF DAI clock control */
+		ret = rt5682_register_dai_clks(component);
+		if (ret)
+			return ret;
+
 		/* Initial setup for CCF */
 		rt5682->lrck[RT5682_AIF1] = CLK_48;
 #endif
-- 
2.7.4


  parent reply	other threads:[~2020-06-12  5:17 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-12  5:15 [PATCH 1/5] ASoC: rt5682: Enable Vref2 under using PLL2 derek.fang
2020-06-12  5:15 ` [PATCH 2/5] ASoC: rl6231: Add new supports on rl6231 derek.fang
2020-06-12  5:15 ` [PATCH 3/5] ASoC: rt5682: Let PLL2 support the freq conversion for 44100Hz sample rate derek.fang
2020-06-12  5:15 ` [PATCH 4/5] ASoC: rt5682: DAI wclk supports 44100 Hz output derek.fang
2020-06-12  5:15 ` derek.fang [this message]
2020-06-15 15:05 ` [PATCH 1/5] ASoC: rt5682: Enable Vref2 under using PLL2 Mark Brown
2020-06-15 23:40 ` Mark Brown

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