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From: Xu Yilun <yilun.xu@intel.com>
To: broonie@kernel.org, linux-spi@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: trix@redhat.com, yilun.xu@intel.com, hao.wu@intel.com,
	matthew.gerlach@linux.intel.com, russell.h.weight@intel.com
Subject: [RESEND PATCH v2 3/3] spi: altera: fix size mismatch on 64 bit processors
Date: Fri, 19 Jun 2020 09:43:41 +0800	[thread overview]
Message-ID: <1592531021-11412-4-git-send-email-yilun.xu@intel.com> (raw)
In-Reply-To: <1592531021-11412-1-git-send-email-yilun.xu@intel.com>

From: Matthew Gerlach <matthew.gerlach@linux.intel.com>

The spi-altera driver was originally written with a 32
bit processor, where sizeof(unsigned long) is 4.  On a
64 bit processor sizeof(unsigned long) is 8.  Change the structure
member to u32 to match the actual size of the control
register.

Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Reviewed-by : Tom Rix <trix@redhat.com>
---
 drivers/spi/spi-altera.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/spi/spi-altera.c b/drivers/spi/spi-altera.c
index 4f7717f..d91c093 100644
--- a/drivers/spi/spi-altera.c
+++ b/drivers/spi/spi-altera.c
@@ -53,7 +53,7 @@ struct altera_spi {
 	int len;
 	int count;
 	int bytes_per_word;
-	unsigned long imr;
+	u32 imr;
 
 	/* data buffers */
 	const unsigned char *tx;
-- 
2.7.4


  parent reply	other threads:[~2020-06-19  1:48 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-19  1:43 [RESEND PATCH v2 0/3] add regmap & indirect access support Xu Yilun
2020-06-19  1:43 ` [RESEND PATCH v2 1/3] spi: altera: use regmap-mmio instead of direct mmio register access Xu Yilun
2020-06-19  1:43 ` [RESEND PATCH v2 2/3] spi: altera: support indirect access to the registers Xu Yilun
2020-06-19  1:43 ` Xu Yilun [this message]
2020-06-19 13:27 ` [RESEND PATCH v2 0/3] add regmap & indirect access support Mark Brown

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