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From: Rajendra Nayak <rnayak@codeaurora.org>
To: bjorn.andersson@linaro.org, agross@kernel.org, broonie@kernel.org
Cc: linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	mka@chromium.org, Rajendra Nayak <rnayak@codeaurora.org>
Subject: [PATCH 2/3] arm64: dts: sdm845: Add qspi opps and power-domains
Date: Fri,  3 Jul 2020 15:11:32 +0530	[thread overview]
Message-ID: <1593769293-6354-3-git-send-email-rnayak@codeaurora.org> (raw)
In-Reply-To: <1593769293-6354-1-git-send-email-rnayak@codeaurora.org>

Add the power domain supporting performance state and the corresponding
OPP tables for the qspi device on sdm845

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
 arch/arm64/boot/dts/qcom/sdm845.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 8eb5a31..5163090 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -2915,6 +2915,30 @@
 			status = "disabled";
 		};
 
+		qspi_opp_table: qspi-opp-table {
+			compatible = "operating-points-v2";
+
+			opp-19200000 {
+				opp-hz = /bits/ 64 <19200000>;
+				required-opps = <&rpmhpd_opp_min_svs>;
+			};
+
+			opp-100000000 {
+				opp-hz = /bits/ 64 <100000000>;
+				required-opps = <&rpmhpd_opp_low_svs>;
+			};
+
+			opp-150000000 {
+				opp-hz = /bits/ 64 <150000000>;
+				required-opps = <&rpmhpd_opp_svs>;
+			};
+
+			opp-300000000 {
+				opp-hz = /bits/ 64 <300000000>;
+				required-opps = <&rpmhpd_opp_nom>;
+			};
+		};
+
 		qspi: spi@88df000 {
 			compatible = "qcom,sdm845-qspi", "qcom,qspi-v1";
 			reg = <0 0x088df000 0 0x600>;
@@ -2924,6 +2948,8 @@
 			clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
 				 <&gcc GCC_QSPI_CORE_CLK>;
 			clock-names = "iface", "core";
+			power-domains = <&rpmhpd SDM845_CX>;
+			operating-points-v2 = <&qspi_opp_table>;
 			status = "disabled";
 		};
 
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation


  parent reply	other threads:[~2020-07-03  9:45 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-03  9:41 [PATCH 0/3] QSPI: Add DVFS support Rajendra Nayak
2020-07-03  9:41 ` [PATCH 1/3] spi: spi-qcom-qspi: Use OPP API to set clk/perf state Rajendra Nayak
2020-07-03 17:01   ` Mark Brown
2020-07-07  4:27     ` Rajendra Nayak
2020-07-03  9:41 ` Rajendra Nayak [this message]
2020-07-06 15:56   ` [PATCH 2/3] arm64: dts: sdm845: Add qspi opps and power-domains Matthias Kaehlcke
2020-07-03  9:41 ` [PATCH 3/3] arm64: dts: sc7180: " Rajendra Nayak
2020-07-06 15:58   ` Matthias Kaehlcke

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