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From: Liu Yi L <yi.l.liu@intel.com>
To: qemu-devel@nongnu.org, alex.williamson@redhat.com, peterx@redhat.com
Cc: mst@redhat.com, pbonzini@redhat.com, eric.auger@redhat.com,
	david@gibson.dropbear.id.au, jean-philippe@linaro.org,
	kevin.tian@intel.com, yi.l.liu@intel.com, jun.j.tian@intel.com,
	yi.y.sun@intel.com, hao.wu@intel.com, kvm@vger.kernel.org,
	jasowang@redhat.com, Jacob Pan <jacob.jun.pan@linux.intel.com>,
	Yi Sun <yi.y.sun@linux.intel.com>,
	Richard Henderson <rth@twiddle.net>,
	Eduardo Habkost <ehabkost@redhat.com>
Subject: [RFC v7 20/25] intel_iommu: do not pass down pasid bind for PASID #0
Date: Sat,  4 Jul 2020 04:36:44 -0700	[thread overview]
Message-ID: <1593862609-36135-21-git-send-email-yi.l.liu@intel.com> (raw)
In-Reply-To: <1593862609-36135-1-git-send-email-yi.l.liu@intel.com>

RID_PASID field was introduced in VT-d 3.0 spec, it is used
for DMA requests w/o PASID in scalable mode VT-d. It is also
known as IOVA. And in VT-d 3.1 spec, there is definition on it:

"Implementations not supporting RID_PASID capability
(ECAP_REG.RPS is 0b), use a PASID value of 0 to perform
address translation for requests without PASID."

This patch adds a check against the PASIDs which are going to be
bound to device. For PASID #0, it is not necessary to pass down
pasid bind request for it since PASID #0 is used as RID_PASID for
DMA requests without pasid. Further reason is current Intel vIOMMU
supports gIOVA by shadowing guest 2nd level page table. However,
in future, if guest IOMMU driver uses 1st level page table to store
IOVA mappings, then guest IOVA support will also be done via nested
translation. When gIOVA is over FLPT, then vIOMMU should pass down
the pasid bind request for PASID #0 to host, host needs to bind the
guest IOVA page table to a proper PASID. e.g. PASID value in RID_PASID
field for PF/VF if ECAP_REG.RPS is clear or default PASID for ADI
(Assignable Device Interface in Scalable IOV solution).

IOVA over FLPT support on Intel VT-d:
https://lkml.org/lkml/2019/9/23/297

Cc: Kevin Tian <kevin.tian@intel.com>
Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
Cc: Peter Xu <peterx@redhat.com>
Cc: Yi Sun <yi.y.sun@linux.intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Liu Yi L <yi.l.liu@intel.com>
---
 hw/i386/intel_iommu.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 9977e70..fb72076 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -1893,6 +1893,16 @@ static int vtd_bind_guest_pasid(IntelIOMMUState *s, VTDBus *vtd_bus,
     HostIOMMUContext *iommu_ctx;
     int ret = -1;
 
+    if (pasid < VTD_HPASID_MIN) {
+        /*
+         * If pasid < VTD_HPASID_MIN, this pasid is not allocated
+         * from host. No need to pass down the changes on it to host.
+         * TODO: when IOVA over FLPT is ready, this switch should be
+         * refined.
+         */
+        return 0;
+    }
+
     vtd_dev_icx = vtd_bus->dev_icx[devfn];
     if (!vtd_dev_icx) {
         /* means no need to go further, e.g. for emulated devices */
-- 
2.7.4


WARNING: multiple messages have this Message-ID (diff)
From: Liu Yi L <yi.l.liu@intel.com>
To: qemu-devel@nongnu.org, alex.williamson@redhat.com, peterx@redhat.com
Cc: jean-philippe@linaro.org, kevin.tian@intel.com,
	yi.l.liu@intel.com, Yi Sun <yi.y.sun@linux.intel.com>,
	Eduardo Habkost <ehabkost@redhat.com>,
	kvm@vger.kernel.org, mst@redhat.com, jun.j.tian@intel.com,
	eric.auger@redhat.com, yi.y.sun@intel.com,
	Jacob Pan <jacob.jun.pan@linux.intel.com>,
	pbonzini@redhat.com, hao.wu@intel.com, jasowang@redhat.com,
	Richard Henderson <rth@twiddle.net>,
	david@gibson.dropbear.id.au
Subject: [RFC v7 20/25] intel_iommu: do not pass down pasid bind for PASID #0
Date: Sat,  4 Jul 2020 04:36:44 -0700	[thread overview]
Message-ID: <1593862609-36135-21-git-send-email-yi.l.liu@intel.com> (raw)
In-Reply-To: <1593862609-36135-1-git-send-email-yi.l.liu@intel.com>

RID_PASID field was introduced in VT-d 3.0 spec, it is used
for DMA requests w/o PASID in scalable mode VT-d. It is also
known as IOVA. And in VT-d 3.1 spec, there is definition on it:

"Implementations not supporting RID_PASID capability
(ECAP_REG.RPS is 0b), use a PASID value of 0 to perform
address translation for requests without PASID."

This patch adds a check against the PASIDs which are going to be
bound to device. For PASID #0, it is not necessary to pass down
pasid bind request for it since PASID #0 is used as RID_PASID for
DMA requests without pasid. Further reason is current Intel vIOMMU
supports gIOVA by shadowing guest 2nd level page table. However,
in future, if guest IOMMU driver uses 1st level page table to store
IOVA mappings, then guest IOVA support will also be done via nested
translation. When gIOVA is over FLPT, then vIOMMU should pass down
the pasid bind request for PASID #0 to host, host needs to bind the
guest IOVA page table to a proper PASID. e.g. PASID value in RID_PASID
field for PF/VF if ECAP_REG.RPS is clear or default PASID for ADI
(Assignable Device Interface in Scalable IOV solution).

IOVA over FLPT support on Intel VT-d:
https://lkml.org/lkml/2019/9/23/297

Cc: Kevin Tian <kevin.tian@intel.com>
Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
Cc: Peter Xu <peterx@redhat.com>
Cc: Yi Sun <yi.y.sun@linux.intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Liu Yi L <yi.l.liu@intel.com>
---
 hw/i386/intel_iommu.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 9977e70..fb72076 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -1893,6 +1893,16 @@ static int vtd_bind_guest_pasid(IntelIOMMUState *s, VTDBus *vtd_bus,
     HostIOMMUContext *iommu_ctx;
     int ret = -1;
 
+    if (pasid < VTD_HPASID_MIN) {
+        /*
+         * If pasid < VTD_HPASID_MIN, this pasid is not allocated
+         * from host. No need to pass down the changes on it to host.
+         * TODO: when IOVA over FLPT is ready, this switch should be
+         * refined.
+         */
+        return 0;
+    }
+
     vtd_dev_icx = vtd_bus->dev_icx[devfn];
     if (!vtd_dev_icx) {
         /* means no need to go further, e.g. for emulated devices */
-- 
2.7.4



  parent reply	other threads:[~2020-07-04 11:30 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-04 11:36 [RFC v7 00/25] intel_iommu: expose Shared Virtual Addressing to VMs Liu Yi L
2020-07-04 11:36 ` Liu Yi L
2020-07-04 11:36 ` [RFC v7 01/25] scripts/update-linux-headers: Import iommu.h Liu Yi L
2020-07-04 11:36   ` Liu Yi L
2020-07-04 11:36 ` [RFC v7 02/25] header file update VFIO/IOMMU vSVA APIs kernel 5.8-rc3 Liu Yi L
2020-07-04 11:36   ` Liu Yi L
2020-07-04 11:36 ` [RFC v7 03/25] hw/pci: modify pci_setup_iommu() to set PCIIOMMUOps Liu Yi L
2020-07-04 11:36   ` Liu Yi L
2020-07-04 11:36 ` [RFC v7 04/25] hw/pci: introduce pci_device_get_iommu_attr() Liu Yi L
2020-07-04 11:36   ` Liu Yi L
2020-07-04 11:36 ` [RFC v7 05/25] intel_iommu: add get_iommu_attr() callback Liu Yi L
2020-07-04 11:36   ` Liu Yi L
2020-07-04 11:36 ` [RFC v7 06/25] vfio: pass nesting requirement into vfio_get_group() Liu Yi L
2020-07-04 11:36   ` Liu Yi L
2020-07-04 11:36 ` [RFC v7 07/25] vfio: check VFIO_TYPE1_NESTING_IOMMU support Liu Yi L
2020-07-04 11:36   ` Liu Yi L
2020-07-04 11:36 ` [RFC v7 08/25] hw/iommu: introduce HostIOMMUContext Liu Yi L
2020-07-04 11:36   ` Liu Yi L
2020-07-04 11:36 ` [RFC v7 09/25] hw/pci: introduce pci_device_set/unset_iommu_context() Liu Yi L
2020-07-04 11:36   ` Liu Yi L
2020-07-04 11:36 ` [RFC v7 10/25] intel_iommu: add set/unset_iommu_context callback Liu Yi L
2020-07-04 11:36   ` Liu Yi L
2020-07-04 11:36 ` [RFC v7 11/25] vfio/common: provide PASID alloc/free hooks Liu Yi L
2020-07-04 11:36   ` Liu Yi L
2020-07-04 11:36 ` [RFC v7 12/25] vfio: init HostIOMMUContext per-container Liu Yi L
2020-07-04 11:36   ` Liu Yi L
2020-07-04 11:36 ` [RFC v7 13/25] intel_iommu: add virtual command capability support Liu Yi L
2020-07-04 11:36   ` Liu Yi L
2020-07-04 11:36 ` [RFC v7 14/25] intel_iommu: process PASID cache invalidation Liu Yi L
2020-07-04 11:36   ` Liu Yi L
2020-07-04 11:36 ` [RFC v7 15/25] intel_iommu: add PASID cache management infrastructure Liu Yi L
2020-07-04 11:36   ` Liu Yi L
2020-07-04 11:36 ` [RFC v7 16/25] vfio: add bind stage-1 page table support Liu Yi L
2020-07-04 11:36   ` Liu Yi L
2020-07-04 11:36 ` [RFC v7 17/25] intel_iommu: sync IOMMU nesting cap info for assigned devices Liu Yi L
2020-07-04 11:36   ` Liu Yi L
2020-07-04 11:36 ` [RFC v7 18/25] intel_iommu: bind/unbind guest page table to host Liu Yi L
2020-07-04 11:36   ` Liu Yi L
2020-07-04 11:36 ` [RFC v7 19/25] intel_iommu: replay pasid binds after context cache invalidation Liu Yi L
2020-07-04 11:36   ` Liu Yi L
2020-07-04 11:36 ` Liu Yi L [this message]
2020-07-04 11:36   ` [RFC v7 20/25] intel_iommu: do not pass down pasid bind for PASID #0 Liu Yi L
2020-07-04 11:36 ` [RFC v7 21/25] vfio: add support for flush iommu stage-1 cache Liu Yi L
2020-07-04 11:36   ` Liu Yi L
2020-07-04 11:36 ` [RFC v7 22/25] intel_iommu: process PASID-based iotlb invalidation Liu Yi L
2020-07-04 11:36   ` Liu Yi L
2020-07-04 11:36 ` [RFC v7 23/25] intel_iommu: propagate PASID-based iotlb invalidation to host Liu Yi L
2020-07-04 11:36   ` Liu Yi L
2020-07-04 11:36 ` [RFC v7 24/25] intel_iommu: process PASID-based Device-TLB invalidation Liu Yi L
2020-07-04 11:36   ` Liu Yi L
2020-07-04 11:36 ` [RFC v7 25/25] intel_iommu: modify x-scalable-mode to be string option Liu Yi L
2020-07-04 11:36   ` Liu Yi L
2020-07-04 11:58 ` [RFC v7 00/25] intel_iommu: expose Shared Virtual Addressing to VMs no-reply
2020-07-04 11:58   ` no-reply

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