From: Cathy Zhang <cathy.zhang@intel.com>
To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, x86@kernel.org
Cc: pbonzini@redhat.com, sean.j.christopherson@intel.com,
vkuznets@redhat.com, wanpengli@tencent.com, jmattson@google.com,
joro@8bytes.org, tglx@linutronix.de, mingo@redhat.com,
bp@alien8.de, hpa@zytor.com,
ricardo.neri-calderon@linux.intel.com, kyung.min.park@intel.com,
Cathy Zhang <cathy.zhang@intel.com>
Subject: [PATCH 0/2] Expose new features for intel processor
Date: Mon, 6 Jul 2020 06:59:50 +0800 [thread overview]
Message-ID: <1593989992-10019-1-git-send-email-cathy.zhang@intel.com> (raw)
This patchset is to expose two new features for intel
processors which support them, like Sapphire Rapids.
SERIALIZE is a faster serializing instruction which
does not modify registers, arithmetic flags or memory,
will not cause VM exit. TSX suspend load tracking
instruction aims to give a way to choose which memory
accesses do not need to be tracked in the TSX read set.
Cathy Zhang (2):
x86: Expose SERIALIZE for supported cpuid
x86: Expose TSX Suspend Load Address Tracking
arch/x86/kvm/cpuid.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--
1.8.3.1
next reply other threads:[~2020-07-05 23:05 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-05 22:59 Cathy Zhang [this message]
2020-07-05 22:59 ` [PATCH 1/2] x86: Expose SERIALIZE for supported cpuid Cathy Zhang
2020-07-06 18:06 ` kernel test robot
2020-07-06 18:06 ` kernel test robot
2020-07-05 22:59 ` [PATCH 2/2] x86: Expose TSX Suspend Load Address Tracking Cathy Zhang
2020-07-06 21:19 ` kernel test robot
2020-07-06 21:19 ` kernel test robot
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