From: Cathy Zhang <cathy.zhang@intel.com>
To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, x86@kernel.org
Cc: pbonzini@redhat.com, sean.j.christopherson@intel.com,
vkuznets@redhat.com, wanpengli@tencent.com, jmattson@google.com,
joro@8bytes.org, tglx@linutronix.de, mingo@redhat.com,
bp@alien8.de, hpa@zytor.com,
ricardo.neri-calderon@linux.intel.com, kyung.min.park@intel.com,
jpoimboe@redhat.com, gregkh@linuxfoundation.org,
ak@linux.intel.com, dave.hansen@intel.com, tony.luck@intel.com,
ravi.v.shankar@intel.com, Cathy Zhang <cathy.zhang@intel.com>
Subject: [PATCH v2 0/4] Expose new features for intel processor
Date: Tue, 7 Jul 2020 10:16:19 +0800 [thread overview]
Message-ID: <1594088183-7187-1-git-send-email-cathy.zhang@intel.com> (raw)
This patchset is to expose two new features for intel
processors which support them, like Sapphire Rapids.
SERIALIZE is a faster serializing instruction which
does not modify registers, arithmetic flags or memory,
will not cause VM exit. TSX suspend load tracking
instruction aims to give a way to choose which memory
accesses do not need to be tracked in the TSX read set.
Changelog:
v2 Add kernel feature enumeration patch to fix build error
Cathy Zhang (2):
x86: Expose SERIALIZE for supported cpuid
x86: Expose TSX Suspend Load Address Tracking
Ricardo Neri (1):
x86/cpufeatures: Add enumeration for SERIALIZE instruction
Kyung Min Park (1):
x86/cpufeatures: Enumerate TSX suspend load address tracking
instructions
arch/x86/include/asm/cpufeatures.h | 2 ++
arch/x86/kvm/cpuid.c | 3 ++-
2 files changed, 4 insertions(+), 1 deletion(-)
--
1.8.3.1
next reply other threads:[~2020-07-07 2:21 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-07 2:16 Cathy Zhang [this message]
2020-07-07 2:16 ` [PATCH v2 1/4] x86/cpufeatures: Add enumeration for SERIALIZE instruction Cathy Zhang
2020-07-07 16:36 ` Andy Lutomirski
2020-07-08 2:21 ` Ricardo Neri
2020-07-22 23:02 ` Thomas Gleixner
2020-07-24 2:03 ` Ricardo Neri
2020-08-18 7:14 ` Paolo Bonzini
2020-07-07 2:16 ` [PATCH v2 2/4] x86/cpufeatures: Enumerate TSX suspend load address tracking instructions Cathy Zhang
2020-07-07 2:36 ` Kyung Min Park
2020-07-07 9:40 ` Greg KH
2020-07-08 8:33 ` Zhang, Cathy
2020-07-07 2:16 ` [PATCH v2 3/4] x86: Expose SERIALIZE for supported cpuid Cathy Zhang
2020-07-14 3:00 ` Sean Christopherson
2020-07-14 22:42 ` Zhang, Cathy
2020-07-14 23:05 ` hpa
2020-07-15 0:03 ` Zhang, Cathy
2020-07-15 4:18 ` hpa
2020-07-07 2:16 ` [PATCH v2 4/4] x86: Expose TSX Suspend Load Address Tracking Cathy Zhang
2020-07-07 23:22 ` [PATCH v2 0/4] Expose new features for intel processor Luck, Tony
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