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From: Crystal Guo <crystal.guo@mediatek.com>
To: <p.zabel@pengutronix.de>, <robh+dt@kernel.org>, <matthias.bgg@gmail.com>
Cc: <srv_heupstream@mediatek.com>,
	<linux-mediatek@lists.infradead.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<seiya.wang@mediatek.com>, Crystal Guo <crystal.guo@mediatek.com>
Subject: [PATCH 2/2] arm64: dts: mt8192: add infracfg_rst node
Date: Wed, 29 Jul 2020 15:39:17 +0800	[thread overview]
Message-ID: <1596008357-11213-3-git-send-email-crystal.guo@mediatek.com> (raw)
In-Reply-To: <1596008357-11213-1-git-send-email-crystal.guo@mediatek.com>

add infracfg_rst node which is for MT8192 platform

Signed-off-by: Crystal Guo <crystal.guo@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8192.dtsi | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index b16dbbd..adc6239 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -217,9 +217,17 @@
 		};
 
 		infracfg: infracfg@10001000 {
-			compatible = "mediatek,mt8192-infracfg", "syscon";
+			compatible = "mediatek,mt8192-infracfg", "syscon", "simple-mfd";
 			reg = <0 0x10001000 0 0x1000>;
 			#clock-cells = <1>;
+
+			infracfg_rst: reset-controller {
+				compatible = "ti,syscon-reset";
+				#reset-cells = <1>;
+				ti,reset-bits = <
+					0x140 15 0x144 15 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* 0: pcie */
+				>;
+			};
 		};
 
 		pericfg: pericfg@10003000 {
-- 
1.8.1.1.dirty

WARNING: multiple messages have this Message-ID (diff)
From: Crystal Guo <crystal.guo@mediatek.com>
To: <p.zabel@pengutronix.de>, <robh+dt@kernel.org>, <matthias.bgg@gmail.com>
Cc: devicetree@vger.kernel.org, srv_heupstream@mediatek.com,
	seiya.wang@mediatek.com, linux-kernel@vger.kernel.org,
	linux-mediatek@lists.infradead.org,
	Crystal Guo <crystal.guo@mediatek.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/2] arm64: dts: mt8192: add infracfg_rst node
Date: Wed, 29 Jul 2020 15:39:17 +0800	[thread overview]
Message-ID: <1596008357-11213-3-git-send-email-crystal.guo@mediatek.com> (raw)
In-Reply-To: <1596008357-11213-1-git-send-email-crystal.guo@mediatek.com>

add infracfg_rst node which is for MT8192 platform

Signed-off-by: Crystal Guo <crystal.guo@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8192.dtsi | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index b16dbbd..adc6239 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -217,9 +217,17 @@
 		};
 
 		infracfg: infracfg@10001000 {
-			compatible = "mediatek,mt8192-infracfg", "syscon";
+			compatible = "mediatek,mt8192-infracfg", "syscon", "simple-mfd";
 			reg = <0 0x10001000 0 0x1000>;
 			#clock-cells = <1>;
+
+			infracfg_rst: reset-controller {
+				compatible = "ti,syscon-reset";
+				#reset-cells = <1>;
+				ti,reset-bits = <
+					0x140 15 0x144 15 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* 0: pcie */
+				>;
+			};
 		};
 
 		pericfg: pericfg@10003000 {
-- 
1.8.1.1.dirty
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Crystal Guo <crystal.guo@mediatek.com>
To: <p.zabel@pengutronix.de>, <robh+dt@kernel.org>, <matthias.bgg@gmail.com>
Cc: devicetree@vger.kernel.org, srv_heupstream@mediatek.com,
	seiya.wang@mediatek.com, linux-kernel@vger.kernel.org,
	linux-mediatek@lists.infradead.org,
	Crystal Guo <crystal.guo@mediatek.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/2] arm64: dts: mt8192: add infracfg_rst node
Date: Wed, 29 Jul 2020 15:39:17 +0800	[thread overview]
Message-ID: <1596008357-11213-3-git-send-email-crystal.guo@mediatek.com> (raw)
In-Reply-To: <1596008357-11213-1-git-send-email-crystal.guo@mediatek.com>

add infracfg_rst node which is for MT8192 platform

Signed-off-by: Crystal Guo <crystal.guo@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8192.dtsi | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index b16dbbd..adc6239 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -217,9 +217,17 @@
 		};
 
 		infracfg: infracfg@10001000 {
-			compatible = "mediatek,mt8192-infracfg", "syscon";
+			compatible = "mediatek,mt8192-infracfg", "syscon", "simple-mfd";
 			reg = <0 0x10001000 0 0x1000>;
 			#clock-cells = <1>;
+
+			infracfg_rst: reset-controller {
+				compatible = "ti,syscon-reset";
+				#reset-cells = <1>;
+				ti,reset-bits = <
+					0x140 15 0x144 15 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* 0: pcie */
+				>;
+			};
 		};
 
 		pericfg: pericfg@10003000 {
-- 
1.8.1.1.dirty
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2020-07-29  7:39 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-29  7:39 [PATCH 0/2] adjust the reset assert and deassert interface Crystal Guo
2020-07-29  7:39 ` Crystal Guo
2020-07-29  7:39 ` Crystal Guo
2020-07-29  7:39 ` [PATCH 1/2] reset-controller: ti: " Crystal Guo
2020-07-29  7:39   ` Crystal Guo
2020-07-29  7:39   ` Crystal Guo
2020-07-29  7:48   ` Matthias Brugger
2020-07-29  7:48     ` Matthias Brugger
2020-07-29  7:48     ` Matthias Brugger
2020-07-29  8:02     ` Philipp Zabel
2020-07-29  8:02       ` Philipp Zabel
2020-07-29  8:02       ` Philipp Zabel
2020-07-30  6:27       ` Crystal Guo
2020-07-30  6:27         ` Crystal Guo
2020-07-30  6:27         ` Crystal Guo
2020-07-29  7:39 ` Crystal Guo [this message]
2020-07-29  7:39   ` [PATCH 2/2] arm64: dts: mt8192: add infracfg_rst node Crystal Guo
2020-07-29  7:39   ` Crystal Guo
2020-07-29  7:45   ` Matthias Brugger
2020-07-29  7:45     ` Matthias Brugger
2020-07-29  7:45     ` Matthias Brugger
2020-07-29  8:18     ` Crystal Guo
2020-07-29  8:18       ` Crystal Guo
2020-07-29  8:18       ` Crystal Guo

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