From: Huacai Chen <chenhc@lemote.com>
To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Marc Zyngier <maz@kernel.org>
Cc: linux-mips@vger.kernel.org, Fuxin Zhang <zhangfx@lemote.com>,
Huacai Chen <chenhuacai@gmail.com>,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
Huacai Chen <chenhc@lemote.com>
Subject: [PATCH 1/3] mips/mm: Add NUMA balancing support
Date: Fri, 31 Jul 2020 18:12:49 +0800 [thread overview]
Message-ID: <1596190371-17405-1-git-send-email-chenhc@lemote.com> (raw)
NUMA balancing is available on nearly all architectures, but MIPS lacks
it for a long time. In theory, the current NUMA balancing framework only
need a "PROTNONE" page table bit and some APIs to manipulate it. So, it
is time for us to add MIPS's NUMA balancing support (Only for 64bit now
because NUMA balancing depends on huge page implicitly).
Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
arch/mips/Kconfig | 1 +
arch/mips/include/asm/pgtable-64.h | 2 +-
arch/mips/include/asm/pgtable-bits.h | 17 +++++++++++++++++
arch/mips/include/asm/pgtable.h | 18 +++++++++++++++---
4 files changed, 34 insertions(+), 4 deletions(-)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 499a20d..62d2b95 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -9,6 +9,7 @@ config MIPS
select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
select ARCH_HAS_UBSAN_SANITIZE_ALL
+ select ARCH_SUPPORTS_NUMA_BALANCING if 64BIT
select ARCH_SUPPORTS_UPROBES
select ARCH_USE_BUILTIN_BSWAP
select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
diff --git a/arch/mips/include/asm/pgtable-64.h b/arch/mips/include/asm/pgtable-64.h
index 1e7d6ce..2aef74b 100644
--- a/arch/mips/include/asm/pgtable-64.h
+++ b/arch/mips/include/asm/pgtable-64.h
@@ -266,7 +266,7 @@ static inline int pmd_present(pmd_t pmd)
{
#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
if (unlikely(pmd_val(pmd) & _PAGE_HUGE))
- return pmd_val(pmd) & _PAGE_PRESENT;
+ return pmd_val(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE);
#endif
return pmd_val(pmd) != (unsigned long) invalid_pte_table;
diff --git a/arch/mips/include/asm/pgtable-bits.h b/arch/mips/include/asm/pgtable-bits.h
index e26dc41..f697c32 100644
--- a/arch/mips/include/asm/pgtable-bits.h
+++ b/arch/mips/include/asm/pgtable-bits.h
@@ -52,6 +52,9 @@ enum pgtable_bits {
_PAGE_WRITE_SHIFT,
_PAGE_ACCESSED_SHIFT,
_PAGE_MODIFIED_SHIFT,
+#if defined(CONFIG_ARCH_SUPPORTS_NUMA_BALANCING)
+ _PAGE_PROTNONE_SHIFT,
+#endif
#if defined(CONFIG_ARCH_HAS_PTE_SPECIAL)
_PAGE_SPECIAL_SHIFT,
#endif
@@ -84,6 +87,9 @@ enum pgtable_bits {
_PAGE_WRITE_SHIFT,
_PAGE_ACCESSED_SHIFT,
_PAGE_MODIFIED_SHIFT,
+#if defined(CONFIG_ARCH_SUPPORTS_NUMA_BALANCING)
+ _PAGE_PROTNONE_SHIFT,
+#endif
#if defined(CONFIG_ARCH_HAS_PTE_SPECIAL)
_PAGE_SPECIAL_SHIFT,
#endif
@@ -102,6 +108,9 @@ enum pgtable_bits {
_PAGE_WRITE_SHIFT,
_PAGE_ACCESSED_SHIFT,
_PAGE_MODIFIED_SHIFT,
+#if defined(CONFIG_ARCH_SUPPORTS_NUMA_BALANCING)
+ _PAGE_PROTNONE_SHIFT,
+#endif
#if defined(CONFIG_ARCH_HAS_PTE_SPECIAL)
_PAGE_SPECIAL_SHIFT,
#endif
@@ -131,6 +140,9 @@ enum pgtable_bits {
#if defined(CONFIG_MIPS_HUGE_TLB_SUPPORT)
_PAGE_HUGE_SHIFT,
#endif
+#if defined(CONFIG_ARCH_SUPPORTS_NUMA_BALANCING)
+ _PAGE_PROTNONE_SHIFT,
+#endif
#if defined(CONFIG_ARCH_HAS_PTE_SPECIAL)
_PAGE_SPECIAL_SHIFT,
#endif
@@ -158,6 +170,11 @@ enum pgtable_bits {
#if defined(CONFIG_MIPS_HUGE_TLB_SUPPORT)
# define _PAGE_HUGE (1 << _PAGE_HUGE_SHIFT)
#endif
+#if defined(CONFIG_ARCH_SUPPORTS_NUMA_BALANCING)
+# define _PAGE_PROTNONE (1 <<_PAGE_PROTNONE_SHIFT)
+#else
+# define _PAGE_PROTNONE 0
+#endif
#if defined(CONFIG_ARCH_HAS_PTE_SPECIAL)
# define _PAGE_SPECIAL (1 << _PAGE_SPECIAL_SHIFT)
#else
diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h
index dd7a0f5..3434073 100644
--- a/arch/mips/include/asm/pgtable.h
+++ b/arch/mips/include/asm/pgtable.h
@@ -25,7 +25,7 @@
struct mm_struct;
struct vm_area_struct;
-#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_NO_READ | \
+#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_NO_READ | \
_page_cachable_default)
#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | \
_page_cachable_default)
@@ -188,7 +188,7 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *pt
#else
#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL))
-#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
+#define pte_present(pte) (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROTNONE))
#define pte_no_exec(pte) (pte_val(pte) & _PAGE_NO_EXEC)
/*
@@ -707,7 +707,7 @@ static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
static inline pmd_t pmd_mkinvalid(pmd_t pmd)
{
- pmd_val(pmd) &= ~(_PAGE_PRESENT | _PAGE_VALID | _PAGE_DIRTY);
+ pmd_val(pmd) &= ~(_PAGE_PRESENT | _PAGE_VALID | _PAGE_PROTNONE | _PAGE_DIRTY);
return pmd;
}
@@ -729,6 +729,18 @@ static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
+#ifdef CONFIG_NUMA_BALANCING
+static inline long pte_protnone(pte_t pte)
+{
+ return (pte_val(pte) & _PAGE_PROTNONE);
+}
+
+static inline long pmd_protnone(pmd_t pmd)
+{
+ return (pmd_val(pmd) & _PAGE_PROTNONE);
+}
+#endif /* CONFIG_NUMA_BALANCING */
+
#ifdef _PAGE_HUGE
#define pmd_leaf(pmd) ((pmd_val(pmd) & _PAGE_HUGE) != 0)
#define pud_leaf(pud) ((pud_val(pud) & _PAGE_HUGE) != 0)
--
2.7.0
next reply other threads:[~2020-07-31 10:10 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-31 10:12 Huacai Chen [this message]
2020-07-31 10:12 ` [PATCH 2/3] mips/mm: include _PAGE_SPECIAL in _PAGE_CHG_MASK Huacai Chen
2020-07-31 10:12 ` [PATCH 3/3] MIPS: Loongson64: Enlarge cross-package node distance Huacai Chen
2020-09-25 1:16 ` [PATCH 1/3] mips/mm: Add NUMA balancing support Huacai Chen
2020-09-25 1:16 ` Huacai Chen
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