From: guoren@kernel.org
To: guoren@kernel.org
Cc: linux-csky@vger.kernel.org, linux-kernel@vger.kernel.org,
Guo Ren <guoren@linux.alibaba.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>
Subject: [PATCH] clocksource/drivers/timer-gx6605s: Fixup counter reload
Date: Tue, 18 Aug 2020 07:31:17 +0000 [thread overview]
Message-ID: <1597735877-71115-1-git-send-email-guoren@kernel.org> (raw)
From: Guo Ren <guoren@linux.alibaba.com>
When the timer counts to the upper limit, an overflow interrupt is
generated, and the count is reset with the value in the TIME_INI
register. But the software expects to start counting from 0 when
the count overflows, so it forces TIME_INI to 0 to solve the
potential interrupt storm problem.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Tested-by: Xu Kai <xukai@nationalchip.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
---
drivers/clocksource/timer-gx6605s.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clocksource/timer-gx6605s.c b/drivers/clocksource/timer-gx6605s.c
index 80d0939..8d386ad 100644
--- a/drivers/clocksource/timer-gx6605s.c
+++ b/drivers/clocksource/timer-gx6605s.c
@@ -28,6 +28,7 @@ static irqreturn_t gx6605s_timer_interrupt(int irq, void *dev)
void __iomem *base = timer_of_base(to_timer_of(ce));
writel_relaxed(GX6605S_STATUS_CLR, base + TIMER_STATUS);
+ writel_relaxed(0, base + TIMER_INI);
ce->event_handler(ce);
--
2.7.4
next reply other threads:[~2020-08-18 7:32 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-18 7:31 guoren [this message]
2020-08-24 9:35 ` [PATCH] clocksource/drivers/timer-gx6605s: Fixup counter reload Daniel Lezcano
2020-09-27 9:27 ` [tip: timers/urgent] " tip-bot2 for Guo Ren
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