[PATCH v1 16/21] drm/mediatek: add ovl bypass shadow register function

[Yongqiang Niu <yongqiang.niu@mediatek.com>]

add ovl bypass shadow register function

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
 drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
index 03eaadb..fb0fe59 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
@@ -19,6 +19,9 @@
 #define DISP_REG_OVL_INTEN			0x0004
 #define OVL_FME_CPL_INT					BIT(1)
 #define DISP_REG_OVL_INTSTA			0x0008
+#define OVL_EN						BIT(0)
+#define OVL_READ_WORK_REG				BIT(20)
+#define OVL_BYPASS_SHADOW				BIT(22)
 #define DISP_REG_OVL_EN				0x000c
 #define DISP_REG_OVL_RST			0x0014
 #define DISP_REG_OVL_ROI_SIZE			0x0020
@@ -62,6 +65,7 @@ struct mtk_disp_ovl_data {
 	unsigned int gmc_bits;
 	unsigned int layer_nr;
 	bool fmt_rgb565_is_0;
+	bool has_shadow;
 };
 
 /**
@@ -126,6 +130,17 @@ static void mtk_ovl_stop(struct mtk_ddp_comp *comp)
 	writel_relaxed(0x0, comp->regs + DISP_REG_OVL_EN);
 }
 
+static void mtk_ovl_bypass_shadow(struct mtk_ddp_comp *comp)
+{
+	struct mtk_disp_ovl *ovl = comp_to_ovl(comp);
+
+	if (ovl->data->has_shadow) {
+		mtk_ddp_write_mask(NULL, OVL_BYPASS_SHADOW, comp,
+				   DISP_REG_OVL_EN,
+				   OVL_BYPASS_SHADOW);
+	}
+}
+
 static void mtk_ovl_config(struct mtk_ddp_comp *comp, unsigned int w,
 			   unsigned int h, unsigned int vrefresh,
 			   unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
@@ -318,6 +333,7 @@ static void mtk_ovl_bgclr_in_off(struct mtk_ddp_comp *comp)
 	.config = mtk_ovl_config,
 	.start = mtk_ovl_start,
 	.stop = mtk_ovl_stop,
+	.bypass_shadow = mtk_ovl_bypass_shadow,
 	.enable_vblank = mtk_ovl_enable_vblank,
 	.disable_vblank = mtk_ovl_disable_vblank,
 	.supported_rotations = mtk_ovl_supported_rotations,
-- 
1.8.1.1.dirty