From: Amit Sunil Dhamne <amit.sunil.dhamne@xilinx.com> To: mturquette@baylibre.com, m.tretter@pengutronix.de, sboyd@kernel.org, michal.simek@xilinx.com, mark.rutland@arm.com, linux-clk@vger.kernel.org Cc: rajanv@xilinx.com, jollys@xilinx.com, tejasp@xilinx.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Rajan Vaja <rajan.vaja@xilinx.com>, Tejas Patel <tejas.patel@xilinx.com>, Amit Sunil Dhamne <amit.sunil.dhamne@xilinx.com> Subject: [PATCH v4 3/3] clk: zynqmp: Use firmware specific mux clock flags Date: Wed, 9 Sep 2020 13:44:48 -0700 [thread overview] Message-ID: <1599684288-20917-4-git-send-email-amit.sunil.dhamne@xilinx.com> (raw) In-Reply-To: <1599684288-20917-1-git-send-email-amit.sunil.dhamne@xilinx.com> From: Rajan Vaja <rajan.vaja@xilinx.com> Use ZynqMP specific mux clock flags instead of using CCF flags. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Signed-off-by: Amit Sunil Dhamne <amit.sunil.dhamne@xilinx.com> --- drivers/clk/zynqmp/clk-mux-zynqmp.c | 23 ++++++++++++++++++++++- drivers/clk/zynqmp/clk-zynqmp.h | 8 ++++++++ 2 files changed, 30 insertions(+), 1 deletion(-) diff --git a/drivers/clk/zynqmp/clk-mux-zynqmp.c b/drivers/clk/zynqmp/clk-mux-zynqmp.c index a49b1c5..4c28b4d 100644 --- a/drivers/clk/zynqmp/clk-mux-zynqmp.c +++ b/drivers/clk/zynqmp/clk-mux-zynqmp.c @@ -90,6 +90,27 @@ static const struct clk_ops zynqmp_clk_mux_ro_ops = { .get_parent = zynqmp_clk_mux_get_parent, }; +static inline unsigned long zynqmp_clk_map_mux_ccf_flags( + const u32 zynqmp_type_flag) +{ + unsigned long ccf_flag = 0; + + if (zynqmp_type_flag & ZYNQMP_CLK_MUX_INDEX_ONE) + ccf_flag |= CLK_MUX_INDEX_ONE; + if (zynqmp_type_flag & ZYNQMP_CLK_MUX_INDEX_BIT) + ccf_flag |= CLK_MUX_INDEX_BIT; + if (zynqmp_type_flag & ZYNQMP_CLK_MUX_HIWORD_MASK) + ccf_flag |= CLK_MUX_HIWORD_MASK; + if (zynqmp_type_flag & ZYNQMP_CLK_MUX_READ_ONLY) + ccf_flag |= CLK_MUX_READ_ONLY; + if (zynqmp_type_flag & ZYNQMP_CLK_MUX_ROUND_CLOSEST) + ccf_flag |= CLK_MUX_ROUND_CLOSEST; + if (zynqmp_type_flag & ZYNQMP_CLK_MUX_BIG_ENDIAN) + ccf_flag |= CLK_MUX_BIG_ENDIAN; + + return ccf_flag; +} + /** * zynqmp_clk_register_mux() - Register a mux table with the clock * framework @@ -125,7 +146,7 @@ struct clk_hw *zynqmp_clk_register_mux(const char *name, u32 clk_id, init.parent_names = parents; init.num_parents = num_parents; - mux->flags = nodes->type_flag; + mux->flags = zynqmp_clk_map_mux_ccf_flags(nodes->type_flag); mux->hw.init = &init; mux->clk_id = clk_id; diff --git a/drivers/clk/zynqmp/clk-zynqmp.h b/drivers/clk/zynqmp/clk-zynqmp.h index 9b2ff35e..87a2e12 100644 --- a/drivers/clk/zynqmp/clk-zynqmp.h +++ b/drivers/clk/zynqmp/clk-zynqmp.h @@ -41,6 +41,14 @@ #define ZYNQMP_CLK_DIVIDER_READ_ONLY BIT(5) #define ZYNQMP_CLK_DIVIDER_MAX_AT_ZERO BIT(6) +/* Type Flags for mux clock */ +#define ZYNQMP_CLK_MUX_INDEX_ONE BIT(0) +#define ZYNQMP_CLK_MUX_INDEX_BIT BIT(1) +#define ZYNQMP_CLK_MUX_HIWORD_MASK BIT(2) +#define ZYNQMP_CLK_MUX_READ_ONLY BIT(3) +#define ZYNQMP_CLK_MUX_ROUND_CLOSEST BIT(4) +#define ZYNQMP_CLK_MUX_BIG_ENDIAN BIT(5) + enum topology_type { TYPE_INVALID, TYPE_MUX, -- 2.7.4 This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.
WARNING: multiple messages have this Message-ID (diff)
From: Amit Sunil Dhamne <amit.sunil.dhamne@xilinx.com> To: mturquette@baylibre.com, m.tretter@pengutronix.de, sboyd@kernel.org, michal.simek@xilinx.com, mark.rutland@arm.com, linux-clk@vger.kernel.org Cc: Tejas Patel <tejas.patel@xilinx.com>, Amit Sunil Dhamne <amit.sunil.dhamne@xilinx.com>, Rajan Vaja <rajan.vaja@xilinx.com>, tejasp@xilinx.com, linux-kernel@vger.kernel.org, jollys@xilinx.com, rajanv@xilinx.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 3/3] clk: zynqmp: Use firmware specific mux clock flags Date: Wed, 9 Sep 2020 13:44:48 -0700 [thread overview] Message-ID: <1599684288-20917-4-git-send-email-amit.sunil.dhamne@xilinx.com> (raw) In-Reply-To: <1599684288-20917-1-git-send-email-amit.sunil.dhamne@xilinx.com> From: Rajan Vaja <rajan.vaja@xilinx.com> Use ZynqMP specific mux clock flags instead of using CCF flags. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Signed-off-by: Amit Sunil Dhamne <amit.sunil.dhamne@xilinx.com> --- drivers/clk/zynqmp/clk-mux-zynqmp.c | 23 ++++++++++++++++++++++- drivers/clk/zynqmp/clk-zynqmp.h | 8 ++++++++ 2 files changed, 30 insertions(+), 1 deletion(-) diff --git a/drivers/clk/zynqmp/clk-mux-zynqmp.c b/drivers/clk/zynqmp/clk-mux-zynqmp.c index a49b1c5..4c28b4d 100644 --- a/drivers/clk/zynqmp/clk-mux-zynqmp.c +++ b/drivers/clk/zynqmp/clk-mux-zynqmp.c @@ -90,6 +90,27 @@ static const struct clk_ops zynqmp_clk_mux_ro_ops = { .get_parent = zynqmp_clk_mux_get_parent, }; +static inline unsigned long zynqmp_clk_map_mux_ccf_flags( + const u32 zynqmp_type_flag) +{ + unsigned long ccf_flag = 0; + + if (zynqmp_type_flag & ZYNQMP_CLK_MUX_INDEX_ONE) + ccf_flag |= CLK_MUX_INDEX_ONE; + if (zynqmp_type_flag & ZYNQMP_CLK_MUX_INDEX_BIT) + ccf_flag |= CLK_MUX_INDEX_BIT; + if (zynqmp_type_flag & ZYNQMP_CLK_MUX_HIWORD_MASK) + ccf_flag |= CLK_MUX_HIWORD_MASK; + if (zynqmp_type_flag & ZYNQMP_CLK_MUX_READ_ONLY) + ccf_flag |= CLK_MUX_READ_ONLY; + if (zynqmp_type_flag & ZYNQMP_CLK_MUX_ROUND_CLOSEST) + ccf_flag |= CLK_MUX_ROUND_CLOSEST; + if (zynqmp_type_flag & ZYNQMP_CLK_MUX_BIG_ENDIAN) + ccf_flag |= CLK_MUX_BIG_ENDIAN; + + return ccf_flag; +} + /** * zynqmp_clk_register_mux() - Register a mux table with the clock * framework @@ -125,7 +146,7 @@ struct clk_hw *zynqmp_clk_register_mux(const char *name, u32 clk_id, init.parent_names = parents; init.num_parents = num_parents; - mux->flags = nodes->type_flag; + mux->flags = zynqmp_clk_map_mux_ccf_flags(nodes->type_flag); mux->hw.init = &init; mux->clk_id = clk_id; diff --git a/drivers/clk/zynqmp/clk-zynqmp.h b/drivers/clk/zynqmp/clk-zynqmp.h index 9b2ff35e..87a2e12 100644 --- a/drivers/clk/zynqmp/clk-zynqmp.h +++ b/drivers/clk/zynqmp/clk-zynqmp.h @@ -41,6 +41,14 @@ #define ZYNQMP_CLK_DIVIDER_READ_ONLY BIT(5) #define ZYNQMP_CLK_DIVIDER_MAX_AT_ZERO BIT(6) +/* Type Flags for mux clock */ +#define ZYNQMP_CLK_MUX_INDEX_ONE BIT(0) +#define ZYNQMP_CLK_MUX_INDEX_BIT BIT(1) +#define ZYNQMP_CLK_MUX_HIWORD_MASK BIT(2) +#define ZYNQMP_CLK_MUX_READ_ONLY BIT(3) +#define ZYNQMP_CLK_MUX_ROUND_CLOSEST BIT(4) +#define ZYNQMP_CLK_MUX_BIG_ENDIAN BIT(5) + enum topology_type { TYPE_INVALID, TYPE_MUX, -- 2.7.4 This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-09-09 20:45 UTC|newest] Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-09-09 20:44 [PATCH v4 0/3] clk: zynqmp: Add firmware specific clock flags Amit Sunil Dhamne 2020-09-09 20:44 ` Amit Sunil Dhamne 2020-09-09 20:44 ` [PATCH v4 1/3] clk: zynqmp: Use firmware specific common " Amit Sunil Dhamne 2020-09-09 20:44 ` Amit Sunil Dhamne 2020-09-09 20:44 ` [PATCH v4 2/3] clk: zynqmp: Use firmware specific divider " Amit Sunil Dhamne 2020-09-09 20:44 ` Amit Sunil Dhamne 2020-09-09 20:44 ` Amit Sunil Dhamne [this message] 2020-09-09 20:44 ` [PATCH v4 3/3] clk: zynqmp: Use firmware specific mux " Amit Sunil Dhamne 2020-09-22 20:07 ` [PATCH v4 0/3] clk: zynqmp: Add firmware specific " Stephen Boyd 2020-09-22 20:07 ` Stephen Boyd
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=1599684288-20917-4-git-send-email-amit.sunil.dhamne@xilinx.com \ --to=amit.sunil.dhamne@xilinx.com \ --cc=jollys@xilinx.com \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-clk@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=m.tretter@pengutronix.de \ --cc=mark.rutland@arm.com \ --cc=michal.simek@xilinx.com \ --cc=mturquette@baylibre.com \ --cc=rajan.vaja@xilinx.com \ --cc=rajanv@xilinx.com \ --cc=sboyd@kernel.org \ --cc=tejas.patel@xilinx.com \ --cc=tejasp@xilinx.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.