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From: Weiyi Lu <weiyi.lu@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Nicolas Boichat <drinkcat@chromium.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-mediatek@lists.infradead.org>, <linux-clk@vger.kernel.org>,
	<srv_heupstream@mediatek.com>, Weiyi Lu <weiyi.lu@mediatek.com>
Subject: [PATCH v2 09/13] clk: mediatek: Clean up the pll_en_bit from en_mask on MT8167
Date: Mon, 9 Nov 2020 10:13:24 +0800	[thread overview]
Message-ID: <1604888008-30555-10-git-send-email-weiyi.lu@mediatek.com> (raw)
In-Reply-To: <1604888008-30555-1-git-send-email-weiyi.lu@mediatek.com>

remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
---
 drivers/clk/mediatek/clk-mt8167.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mt8167.c b/drivers/clk/mediatek/clk-mt8167.c
index e5ea10e..180e24a 100644
--- a/drivers/clk/mediatek/clk-mt8167.c
+++ b/drivers/clk/mediatek/clk-mt8167.c
@@ -1016,21 +1016,21 @@ static void __init mtk_infracfg_init(struct device_node *node)
 };
 
 static const struct mtk_pll_data plls[] = {
-	PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0100, 0x0110, 0x00000001, 0,
+	PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0100, 0x0110, 0, 0,
 		21, 0x0104, 24, 0, 0x0104, 0),
-	PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x0120, 0x0130, 0x00000001,
+	PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x0120, 0x0130, 0,
 		HAVE_RST_BAR, 21, 0x0124, 24, 0, 0x0124, 0),
-	PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x0140, 0x0150, 0x30000001,
+	PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x0140, 0x0150, 0x30000000,
 		HAVE_RST_BAR, 7, 0x0144, 24, 0, 0x0144, 0),
-	PLL_B(CLK_APMIXED_MMPLL, "mmpll", 0x0160, 0x0170, 0x00000001, 0,
+	PLL_B(CLK_APMIXED_MMPLL, "mmpll", 0x0160, 0x0170, 0, 0,
 		21, 0x0164, 24, 0, 0x0164, 0, mmpll_div_table),
-	PLL(CLK_APMIXED_APLL1, "apll1", 0x0180, 0x0190, 0x00000001, 0,
+	PLL(CLK_APMIXED_APLL1, "apll1", 0x0180, 0x0190, 0, 0,
 		31, 0x0180, 1, 0x0194, 0x0184, 0),
-	PLL(CLK_APMIXED_APLL2, "apll2", 0x01A0, 0x01B0, 0x00000001, 0,
+	PLL(CLK_APMIXED_APLL2, "apll2", 0x01A0, 0x01B0, 0, 0,
 		31, 0x01A0, 1, 0x01B4, 0x01A4, 0),
-	PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x01C0, 0x01D0, 0x00000001, 0,
+	PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x01C0, 0x01D0, 0, 0,
 		21, 0x01C4, 24, 0, 0x01C4, 0),
-	PLL(CLK_APMIXED_LVDSPLL, "lvdspll", 0x01E0, 0x01F0, 0x00000001, 0,
+	PLL(CLK_APMIXED_LVDSPLL, "lvdspll", 0x01E0, 0x01F0, 0, 0,
 		21, 0x01E4, 24, 0, 0x01E4, 0),
 };
 
-- 
1.8.1.1.dirty

WARNING: multiple messages have this Message-ID (diff)
From: Weiyi Lu <weiyi.lu@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Nicolas Boichat <drinkcat@chromium.org>
Cc: Weiyi Lu <weiyi.lu@mediatek.com>,
	srv_heupstream@mediatek.com, linux-kernel@vger.kernel.org,
	linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 09/13] clk: mediatek: Clean up the pll_en_bit from en_mask on MT8167
Date: Mon, 9 Nov 2020 10:13:24 +0800	[thread overview]
Message-ID: <1604888008-30555-10-git-send-email-weiyi.lu@mediatek.com> (raw)
In-Reply-To: <1604888008-30555-1-git-send-email-weiyi.lu@mediatek.com>

remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
---
 drivers/clk/mediatek/clk-mt8167.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mt8167.c b/drivers/clk/mediatek/clk-mt8167.c
index e5ea10e..180e24a 100644
--- a/drivers/clk/mediatek/clk-mt8167.c
+++ b/drivers/clk/mediatek/clk-mt8167.c
@@ -1016,21 +1016,21 @@ static void __init mtk_infracfg_init(struct device_node *node)
 };
 
 static const struct mtk_pll_data plls[] = {
-	PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0100, 0x0110, 0x00000001, 0,
+	PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0100, 0x0110, 0, 0,
 		21, 0x0104, 24, 0, 0x0104, 0),
-	PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x0120, 0x0130, 0x00000001,
+	PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x0120, 0x0130, 0,
 		HAVE_RST_BAR, 21, 0x0124, 24, 0, 0x0124, 0),
-	PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x0140, 0x0150, 0x30000001,
+	PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x0140, 0x0150, 0x30000000,
 		HAVE_RST_BAR, 7, 0x0144, 24, 0, 0x0144, 0),
-	PLL_B(CLK_APMIXED_MMPLL, "mmpll", 0x0160, 0x0170, 0x00000001, 0,
+	PLL_B(CLK_APMIXED_MMPLL, "mmpll", 0x0160, 0x0170, 0, 0,
 		21, 0x0164, 24, 0, 0x0164, 0, mmpll_div_table),
-	PLL(CLK_APMIXED_APLL1, "apll1", 0x0180, 0x0190, 0x00000001, 0,
+	PLL(CLK_APMIXED_APLL1, "apll1", 0x0180, 0x0190, 0, 0,
 		31, 0x0180, 1, 0x0194, 0x0184, 0),
-	PLL(CLK_APMIXED_APLL2, "apll2", 0x01A0, 0x01B0, 0x00000001, 0,
+	PLL(CLK_APMIXED_APLL2, "apll2", 0x01A0, 0x01B0, 0, 0,
 		31, 0x01A0, 1, 0x01B4, 0x01A4, 0),
-	PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x01C0, 0x01D0, 0x00000001, 0,
+	PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x01C0, 0x01D0, 0, 0,
 		21, 0x01C4, 24, 0, 0x01C4, 0),
-	PLL(CLK_APMIXED_LVDSPLL, "lvdspll", 0x01E0, 0x01F0, 0x00000001, 0,
+	PLL(CLK_APMIXED_LVDSPLL, "lvdspll", 0x01E0, 0x01F0, 0, 0,
 		21, 0x01E4, 24, 0, 0x01E4, 0),
 };
 
-- 
1.8.1.1.dirty
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Weiyi Lu <weiyi.lu@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Nicolas Boichat <drinkcat@chromium.org>
Cc: Weiyi Lu <weiyi.lu@mediatek.com>,
	srv_heupstream@mediatek.com, linux-kernel@vger.kernel.org,
	linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 09/13] clk: mediatek: Clean up the pll_en_bit from en_mask on MT8167
Date: Mon, 9 Nov 2020 10:13:24 +0800	[thread overview]
Message-ID: <1604888008-30555-10-git-send-email-weiyi.lu@mediatek.com> (raw)
In-Reply-To: <1604888008-30555-1-git-send-email-weiyi.lu@mediatek.com>

remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
---
 drivers/clk/mediatek/clk-mt8167.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mt8167.c b/drivers/clk/mediatek/clk-mt8167.c
index e5ea10e..180e24a 100644
--- a/drivers/clk/mediatek/clk-mt8167.c
+++ b/drivers/clk/mediatek/clk-mt8167.c
@@ -1016,21 +1016,21 @@ static void __init mtk_infracfg_init(struct device_node *node)
 };
 
 static const struct mtk_pll_data plls[] = {
-	PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0100, 0x0110, 0x00000001, 0,
+	PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0100, 0x0110, 0, 0,
 		21, 0x0104, 24, 0, 0x0104, 0),
-	PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x0120, 0x0130, 0x00000001,
+	PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x0120, 0x0130, 0,
 		HAVE_RST_BAR, 21, 0x0124, 24, 0, 0x0124, 0),
-	PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x0140, 0x0150, 0x30000001,
+	PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x0140, 0x0150, 0x30000000,
 		HAVE_RST_BAR, 7, 0x0144, 24, 0, 0x0144, 0),
-	PLL_B(CLK_APMIXED_MMPLL, "mmpll", 0x0160, 0x0170, 0x00000001, 0,
+	PLL_B(CLK_APMIXED_MMPLL, "mmpll", 0x0160, 0x0170, 0, 0,
 		21, 0x0164, 24, 0, 0x0164, 0, mmpll_div_table),
-	PLL(CLK_APMIXED_APLL1, "apll1", 0x0180, 0x0190, 0x00000001, 0,
+	PLL(CLK_APMIXED_APLL1, "apll1", 0x0180, 0x0190, 0, 0,
 		31, 0x0180, 1, 0x0194, 0x0184, 0),
-	PLL(CLK_APMIXED_APLL2, "apll2", 0x01A0, 0x01B0, 0x00000001, 0,
+	PLL(CLK_APMIXED_APLL2, "apll2", 0x01A0, 0x01B0, 0, 0,
 		31, 0x01A0, 1, 0x01B4, 0x01A4, 0),
-	PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x01C0, 0x01D0, 0x00000001, 0,
+	PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x01C0, 0x01D0, 0, 0,
 		21, 0x01C4, 24, 0, 0x01C4, 0),
-	PLL(CLK_APMIXED_LVDSPLL, "lvdspll", 0x01E0, 0x01F0, 0x00000001, 0,
+	PLL(CLK_APMIXED_LVDSPLL, "lvdspll", 0x01E0, 0x01F0, 0, 0,
 		21, 0x01E4, 24, 0, 0x01E4, 0),
 };
 
-- 
1.8.1.1.dirty
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2020-11-09  2:15 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-09  2:13 [PATCH v2 00/13] Clean up the pll_en_bit from en_mask on all the MediaTek clock drivers Weiyi Lu
2020-11-09  2:13 ` Weiyi Lu
2020-11-09  2:13 ` Weiyi Lu
2020-11-09  2:13 ` [PATCH v2 01/13] clk: mediatek: Clean up the pll_en_bit from en_mask on MT2701 Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-11-09  2:13 ` [PATCH v2 02/13] clk: mediatek: Clean up the pll_en_bit from en_mask on MT2712 Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-11-09  2:13 ` [PATCH v2 03/13] clk: mediatek: Clean up the pll_en_bit from en_mask on MT6765 Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-11-09  2:13 ` [PATCH v2 04/13] clk: mediatek: Clean up the pll_en_bit from en_mask on MT6779 Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-11-09  2:13 ` [PATCH v2 05/13] clk: mediatek: Clean up the pll_en_bit from en_mask on MT6797 Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-11-09  2:13 ` [PATCH v2 06/13] clk: mediatek: Clean up the pll_en_bit from en_mask on MT7622 Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-11-09  2:13 ` [PATCH v2 07/13] clk: mediatek: Clean up the pll_en_bit from en_mask on MT7629 Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-11-09  2:13 ` [PATCH v2 08/13] clk: mediatek: Clean up the pll_en_bit from en_mask on MT8135 Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-11-09  2:13 ` Weiyi Lu [this message]
2020-11-09  2:13   ` [PATCH v2 09/13] clk: mediatek: Clean up the pll_en_bit from en_mask on MT8167 Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-11-09  2:13 ` [PATCH v2 10/13] clk: mediatek: Clean up the pll_en_bit from en_mask on MT8173 Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-11-09  2:13 ` [PATCH v2 11/13] clk: mediatek: Clean up the pll_en_bit from en_mask on MT8183 Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-11-09  2:13 ` [PATCH v2 12/13] clk: mediatek: Clean up the pll_en_bit from en_mask on MT8516 Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-11-09  2:13 ` [PATCH v2 13/13] clk: mediatek: use en_mask as a pure div_en_mask Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-11-09  2:13   ` Weiyi Lu
2020-12-17  9:17 ` [PATCH v2 00/13] Clean up the pll_en_bit from en_mask on all the MediaTek clock drivers Stephen Boyd
2020-12-17  9:17   ` Stephen Boyd
2020-12-17  9:17   ` Stephen Boyd

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