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From: Manish Narani <manish.narani@xilinx.com>
To: <michal.simek@xilinx.com>, <adrian.hunter@intel.com>,
	<ulf.hansson@linaro.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
	<linux-mmc@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<git@xilinx.com>, Manish Narani <manish.narani@xilinx.com>,
	Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Subject: [PATCH v2 2/3] mmc: sdhci-of-arasan: Use Mask writes for Tap delays
Date: Mon, 16 Nov 2020 14:02:44 +0530	[thread overview]
Message-ID: <1605515565-117562-3-git-send-email-manish.narani@xilinx.com> (raw)
In-Reply-To: <1605515565-117562-1-git-send-email-manish.narani@xilinx.com>

Mask the ITAP and OTAP delay bits before updating with the new
tap value for Versal platform.

Fixes: 1a470721c8f5 ("sdhci: arasan: Add support for Versal Tap Delays")
Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
---
 drivers/mmc/host/sdhci-of-arasan.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c
index 100621e55427..3ec5ecad637c 100644
--- a/drivers/mmc/host/sdhci-of-arasan.c
+++ b/drivers/mmc/host/sdhci-of-arasan.c
@@ -30,7 +30,10 @@
 #define SDHCI_ARASAN_VENDOR_REGISTER	0x78
 
 #define SDHCI_ARASAN_ITAPDLY_REGISTER	0xF0F8
+#define SDHCI_ARASAN_ITAPDLY_SEL_MASK	0xFF
+
 #define SDHCI_ARASAN_OTAPDLY_REGISTER	0xF0FC
+#define SDHCI_ARASAN_OTAPDLY_SEL_MASK	0x3F
 
 #define SDHCI_ARASAN_CQE_BASE_ADDR	0x200
 #define VENDOR_ENHANCED_STROBE		BIT(0)
@@ -755,6 +758,7 @@ static int sdhci_versal_sdcardclk_set_phase(struct clk_hw *hw, int degrees)
 		regval = sdhci_readl(host, SDHCI_ARASAN_OTAPDLY_REGISTER);
 		regval |= SDHCI_OTAPDLY_ENABLE;
 		sdhci_writel(host, regval, SDHCI_ARASAN_OTAPDLY_REGISTER);
+		regval &= ~SDHCI_ARASAN_OTAPDLY_SEL_MASK;
 		regval |= tap_delay;
 		sdhci_writel(host, regval, SDHCI_ARASAN_OTAPDLY_REGISTER);
 	}
@@ -822,6 +826,7 @@ static int sdhci_versal_sampleclk_set_phase(struct clk_hw *hw, int degrees)
 		sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER);
 		regval |= SDHCI_ITAPDLY_ENABLE;
 		sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER);
+		regval &= ~SDHCI_ARASAN_ITAPDLY_SEL_MASK;
 		regval |= tap_delay;
 		sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER);
 		regval &= ~SDHCI_ITAPDLY_CHGWIN;
-- 
2.17.1


WARNING: multiple messages have this Message-ID (diff)
From: Manish Narani <manish.narani@xilinx.com>
To: <michal.simek@xilinx.com>, <adrian.hunter@intel.com>,
	<ulf.hansson@linaro.org>
Cc: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>,
	linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
	Manish Narani <manish.narani@xilinx.com>,
	git@xilinx.com, linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 2/3] mmc: sdhci-of-arasan: Use Mask writes for Tap delays
Date: Mon, 16 Nov 2020 14:02:44 +0530	[thread overview]
Message-ID: <1605515565-117562-3-git-send-email-manish.narani@xilinx.com> (raw)
In-Reply-To: <1605515565-117562-1-git-send-email-manish.narani@xilinx.com>

Mask the ITAP and OTAP delay bits before updating with the new
tap value for Versal platform.

Fixes: 1a470721c8f5 ("sdhci: arasan: Add support for Versal Tap Delays")
Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
---
 drivers/mmc/host/sdhci-of-arasan.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c
index 100621e55427..3ec5ecad637c 100644
--- a/drivers/mmc/host/sdhci-of-arasan.c
+++ b/drivers/mmc/host/sdhci-of-arasan.c
@@ -30,7 +30,10 @@
 #define SDHCI_ARASAN_VENDOR_REGISTER	0x78
 
 #define SDHCI_ARASAN_ITAPDLY_REGISTER	0xF0F8
+#define SDHCI_ARASAN_ITAPDLY_SEL_MASK	0xFF
+
 #define SDHCI_ARASAN_OTAPDLY_REGISTER	0xF0FC
+#define SDHCI_ARASAN_OTAPDLY_SEL_MASK	0x3F
 
 #define SDHCI_ARASAN_CQE_BASE_ADDR	0x200
 #define VENDOR_ENHANCED_STROBE		BIT(0)
@@ -755,6 +758,7 @@ static int sdhci_versal_sdcardclk_set_phase(struct clk_hw *hw, int degrees)
 		regval = sdhci_readl(host, SDHCI_ARASAN_OTAPDLY_REGISTER);
 		regval |= SDHCI_OTAPDLY_ENABLE;
 		sdhci_writel(host, regval, SDHCI_ARASAN_OTAPDLY_REGISTER);
+		regval &= ~SDHCI_ARASAN_OTAPDLY_SEL_MASK;
 		regval |= tap_delay;
 		sdhci_writel(host, regval, SDHCI_ARASAN_OTAPDLY_REGISTER);
 	}
@@ -822,6 +826,7 @@ static int sdhci_versal_sampleclk_set_phase(struct clk_hw *hw, int degrees)
 		sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER);
 		regval |= SDHCI_ITAPDLY_ENABLE;
 		sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER);
+		regval &= ~SDHCI_ARASAN_ITAPDLY_SEL_MASK;
 		regval |= tap_delay;
 		sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER);
 		regval &= ~SDHCI_ITAPDLY_CHGWIN;
-- 
2.17.1


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  parent reply	other threads:[~2020-11-16  8:50 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-16  8:32 [PATCH v2 0/3] Bug Fixes to Tap Delay code in SDHCI Arasan driver Manish Narani
2020-11-16  8:32 ` Manish Narani
2020-11-16  8:32 ` [PATCH v2 1/3] mmc: sdhci-of-arasan: Allow configuring zero tap values Manish Narani
2020-11-16  8:32   ` Manish Narani
2020-11-16  8:32 ` Manish Narani [this message]
2020-11-16  8:32   ` [PATCH v2 2/3] mmc: sdhci-of-arasan: Use Mask writes for Tap delays Manish Narani
2020-11-16  8:32 ` [PATCH v2 3/3] mmc: sdhci-of-arasan: Issue DLL reset explicitly Manish Narani
2020-11-16  8:32   ` Manish Narani
2020-11-16 15:04 ` [PATCH v2 0/3] Bug Fixes to Tap Delay code in SDHCI Arasan driver Michal Simek
2020-11-16 15:04   ` Michal Simek
2020-11-17 11:50 ` Ulf Hansson
2020-11-17 11:50   ` Ulf Hansson

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