From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> To: <devicetree@vger.kernel.org> Cc: <linux-clk@vger.kernel.org>, <gregkh@linuxfoundation.org>, <robh+dt@kernel.org>, <sboyd@kernel.org>, <mturquette@baylibre.com>, <shubhrajyoti.datta@gmail.com>, <git@xilinx.com>, <miquel.raynal@bootlin.com>, <devel@driverdev.osuosl.org>, Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Subject: [PATCH v10 9/9] clk: clock-wizard: Add the clockwizard to clk directory Date: Wed, 24 Feb 2021 18:40:41 +0530 [thread overview] Message-ID: <1614172241-17326-10-git-send-email-shubhrajyoti.datta@xilinx.com> (raw) In-Reply-To: <1614172241-17326-1-git-send-email-shubhrajyoti.datta@xilinx.com> Add clocking wizard driver to clk. And delete the driver from the staging as it is in drivers/clk. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> --- drivers/clk/Kconfig | 9 +++++++ drivers/clk/Makefile | 1 + .../clk-xlnx-clock-wizard.c | 3 ++- drivers/staging/Kconfig | 2 -- drivers/staging/Makefile | 1 - drivers/staging/clocking-wizard/Kconfig | 10 -------- drivers/staging/clocking-wizard/Makefile | 2 -- drivers/staging/clocking-wizard/TODO | 12 --------- drivers/staging/clocking-wizard/dt-binding.txt | 30 ---------------------- 9 files changed, 12 insertions(+), 58 deletions(-) rename drivers/{staging/clocking-wizard => clk}/clk-xlnx-clock-wizard.c (99%) delete mode 100644 drivers/staging/clocking-wizard/Kconfig delete mode 100644 drivers/staging/clocking-wizard/Makefile delete mode 100644 drivers/staging/clocking-wizard/TODO delete mode 100644 drivers/staging/clocking-wizard/dt-binding.txt diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 85856cff..03ccd77 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -368,6 +368,15 @@ config COMMON_CLK_FIXED_MMIO help Support for Memory Mapped IO Fixed clocks +config COMMON_CLK_XLNX_CLKWZRD + tristate "Xilinx Clocking Wizard" + depends on COMMON_CLK && OF + help + Support for the Xilinx Clocking Wizard IP core clock generator. + Adds support for clocking wizard and compatible. + This driver supports the Xilinx clocking wizard programmable clock + synthesizer. The number of output is configurable in the design. + source "drivers/clk/actions/Kconfig" source "drivers/clk/analogbits/Kconfig" source "drivers/clk/baikal-t1/Kconfig" diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index dbdc590..b1cc447 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -70,6 +70,7 @@ obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o obj-$(CONFIG_COMMON_CLK_VC5) += clk-versaclock5.o obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o obj-$(CONFIG_COMMON_CLK_XGENE) += clk-xgene.o +obj-$(CONFIG_COMMON_CLK_XLNX_CLKWZRD) += clk-xlnx-clock-wizard.o # please keep this section sorted lexicographically by directory path name obj-y += actions/ diff --git a/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c b/drivers/clk/clk-xlnx-clock-wizard.c similarity index 99% rename from drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c rename to drivers/clk/clk-xlnx-clock-wizard.c index b0ced42..6cb8b79 100644 --- a/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c +++ b/drivers/clk/clk-xlnx-clock-wizard.c @@ -2,9 +2,10 @@ /* * Xilinx 'Clocking Wizard' driver * - * Copyright (C) 2013 - 2014 Xilinx + * Copyright (C) 2013 - 2021 Xilinx * * Sören Brinkmann <soren.brinkmann@xilinx.com> + * */ #include <linux/platform_device.h> diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig index b22f73d..d032fb5 100644 --- a/drivers/staging/Kconfig +++ b/drivers/staging/Kconfig @@ -74,8 +74,6 @@ source "drivers/staging/gs_fpgaboot/Kconfig" source "drivers/staging/unisys/Kconfig" -source "drivers/staging/clocking-wizard/Kconfig" - source "drivers/staging/fbtft/Kconfig" source "drivers/staging/fsl-dpaa2/Kconfig" diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile index 2245059..2327185 100644 --- a/drivers/staging/Makefile +++ b/drivers/staging/Makefile @@ -27,7 +27,6 @@ obj-$(CONFIG_LTE_GDM724X) += gdm724x/ obj-$(CONFIG_FIREWIRE_SERIAL) += fwserial/ obj-$(CONFIG_GS_FPGABOOT) += gs_fpgaboot/ obj-$(CONFIG_UNISYSSPAR) += unisys/ -obj-$(CONFIG_COMMON_CLK_XLNX_CLKWZRD) += clocking-wizard/ obj-$(CONFIG_FB_TFT) += fbtft/ obj-$(CONFIG_FSL_DPAA2) += fsl-dpaa2/ obj-$(CONFIG_MOST) += most/ diff --git a/drivers/staging/clocking-wizard/Kconfig b/drivers/staging/clocking-wizard/Kconfig deleted file mode 100644 index 69cf514..0000000 --- a/drivers/staging/clocking-wizard/Kconfig +++ /dev/null @@ -1,10 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -# -# Xilinx Clocking Wizard Driver -# - -config COMMON_CLK_XLNX_CLKWZRD - tristate "Xilinx Clocking Wizard" - depends on COMMON_CLK && OF && IOMEM - help - Support for the Xilinx Clocking Wizard IP core clock generator. diff --git a/drivers/staging/clocking-wizard/Makefile b/drivers/staging/clocking-wizard/Makefile deleted file mode 100644 index b1f9152..0000000 --- a/drivers/staging/clocking-wizard/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -obj-$(CONFIG_COMMON_CLK_XLNX_CLKWZRD) += clk-xlnx-clock-wizard.o diff --git a/drivers/staging/clocking-wizard/TODO b/drivers/staging/clocking-wizard/TODO deleted file mode 100644 index ebe99db..0000000 --- a/drivers/staging/clocking-wizard/TODO +++ /dev/null @@ -1,12 +0,0 @@ -TODO: - - support for fractional multiplier - - support for fractional divider (output 0 only) - - support for set_rate() operations (may benefit from Stephen Boyd's - refactoring of the clk primitives: https://lkml.org/lkml/2014/9/5/766) - - review arithmetic - - overflow after multiplication? - - maximize accuracy before divisions - -Patches to: - Greg Kroah-Hartman <gregkh@linuxfoundation.org> - Sören Brinkmann <soren.brinkmann@xilinx.com> diff --git a/drivers/staging/clocking-wizard/dt-binding.txt b/drivers/staging/clocking-wizard/dt-binding.txt deleted file mode 100644 index efb67ff..0000000 --- a/drivers/staging/clocking-wizard/dt-binding.txt +++ /dev/null @@ -1,30 +0,0 @@ -Binding for Xilinx Clocking Wizard IP Core - -This binding uses the common clock binding[1]. Details about the devices can be -found in the product guide[2]. - -[1] Documentation/devicetree/bindings/clock/clock-bindings.txt -[2] Clocking Wizard Product Guide -https://www.xilinx.com/support/documentation/ip_documentation/clk_wiz/v5_1/pg065-clk-wiz.pdf - -Required properties: - - compatible: Must be 'xlnx,clocking-wizard' - - reg: Base and size of the cores register space - - clocks: Handle to input clock - - clock-names: Tuple containing 'clk_in1' and 's_axi_aclk' - - clock-output-names: Names for the output clocks - -Optional properties: - - speed-grade: Speed grade of the device (valid values are 1..3) - -Example: - clock-generator@40040000 { - reg = <0x40040000 0x1000>; - compatible = "xlnx,clocking-wizard"; - speed-grade = <1>; - clock-names = "clk_in1", "s_axi_aclk"; - clocks = <&clkc 15>, <&clkc 15>; - clock-output-names = "clk_out0", "clk_out1", "clk_out2", - "clk_out3", "clk_out4", "clk_out5", - "clk_out6", "clk_out7"; - }; -- 2.1.1
WARNING: multiple messages have this Message-ID (diff)
From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> To: <devicetree@vger.kernel.org> Cc: devel@driverdev.osuosl.org, shubhrajyoti.datta@gmail.com, sboyd@kernel.org, gregkh@linuxfoundation.org, mturquette@baylibre.com, Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>, robh+dt@kernel.org, git@xilinx.com, miquel.raynal@bootlin.com, linux-clk@vger.kernel.org Subject: [PATCH v10 9/9] clk: clock-wizard: Add the clockwizard to clk directory Date: Wed, 24 Feb 2021 18:40:41 +0530 [thread overview] Message-ID: <1614172241-17326-10-git-send-email-shubhrajyoti.datta@xilinx.com> (raw) In-Reply-To: <1614172241-17326-1-git-send-email-shubhrajyoti.datta@xilinx.com> Add clocking wizard driver to clk. And delete the driver from the staging as it is in drivers/clk. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> --- drivers/clk/Kconfig | 9 +++++++ drivers/clk/Makefile | 1 + .../clk-xlnx-clock-wizard.c | 3 ++- drivers/staging/Kconfig | 2 -- drivers/staging/Makefile | 1 - drivers/staging/clocking-wizard/Kconfig | 10 -------- drivers/staging/clocking-wizard/Makefile | 2 -- drivers/staging/clocking-wizard/TODO | 12 --------- drivers/staging/clocking-wizard/dt-binding.txt | 30 ---------------------- 9 files changed, 12 insertions(+), 58 deletions(-) rename drivers/{staging/clocking-wizard => clk}/clk-xlnx-clock-wizard.c (99%) delete mode 100644 drivers/staging/clocking-wizard/Kconfig delete mode 100644 drivers/staging/clocking-wizard/Makefile delete mode 100644 drivers/staging/clocking-wizard/TODO delete mode 100644 drivers/staging/clocking-wizard/dt-binding.txt diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 85856cff..03ccd77 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -368,6 +368,15 @@ config COMMON_CLK_FIXED_MMIO help Support for Memory Mapped IO Fixed clocks +config COMMON_CLK_XLNX_CLKWZRD + tristate "Xilinx Clocking Wizard" + depends on COMMON_CLK && OF + help + Support for the Xilinx Clocking Wizard IP core clock generator. + Adds support for clocking wizard and compatible. + This driver supports the Xilinx clocking wizard programmable clock + synthesizer. The number of output is configurable in the design. + source "drivers/clk/actions/Kconfig" source "drivers/clk/analogbits/Kconfig" source "drivers/clk/baikal-t1/Kconfig" diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index dbdc590..b1cc447 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -70,6 +70,7 @@ obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o obj-$(CONFIG_COMMON_CLK_VC5) += clk-versaclock5.o obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o obj-$(CONFIG_COMMON_CLK_XGENE) += clk-xgene.o +obj-$(CONFIG_COMMON_CLK_XLNX_CLKWZRD) += clk-xlnx-clock-wizard.o # please keep this section sorted lexicographically by directory path name obj-y += actions/ diff --git a/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c b/drivers/clk/clk-xlnx-clock-wizard.c similarity index 99% rename from drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c rename to drivers/clk/clk-xlnx-clock-wizard.c index b0ced42..6cb8b79 100644 --- a/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c +++ b/drivers/clk/clk-xlnx-clock-wizard.c @@ -2,9 +2,10 @@ /* * Xilinx 'Clocking Wizard' driver * - * Copyright (C) 2013 - 2014 Xilinx + * Copyright (C) 2013 - 2021 Xilinx * * Sören Brinkmann <soren.brinkmann@xilinx.com> + * */ #include <linux/platform_device.h> diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig index b22f73d..d032fb5 100644 --- a/drivers/staging/Kconfig +++ b/drivers/staging/Kconfig @@ -74,8 +74,6 @@ source "drivers/staging/gs_fpgaboot/Kconfig" source "drivers/staging/unisys/Kconfig" -source "drivers/staging/clocking-wizard/Kconfig" - source "drivers/staging/fbtft/Kconfig" source "drivers/staging/fsl-dpaa2/Kconfig" diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile index 2245059..2327185 100644 --- a/drivers/staging/Makefile +++ b/drivers/staging/Makefile @@ -27,7 +27,6 @@ obj-$(CONFIG_LTE_GDM724X) += gdm724x/ obj-$(CONFIG_FIREWIRE_SERIAL) += fwserial/ obj-$(CONFIG_GS_FPGABOOT) += gs_fpgaboot/ obj-$(CONFIG_UNISYSSPAR) += unisys/ -obj-$(CONFIG_COMMON_CLK_XLNX_CLKWZRD) += clocking-wizard/ obj-$(CONFIG_FB_TFT) += fbtft/ obj-$(CONFIG_FSL_DPAA2) += fsl-dpaa2/ obj-$(CONFIG_MOST) += most/ diff --git a/drivers/staging/clocking-wizard/Kconfig b/drivers/staging/clocking-wizard/Kconfig deleted file mode 100644 index 69cf514..0000000 --- a/drivers/staging/clocking-wizard/Kconfig +++ /dev/null @@ -1,10 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -# -# Xilinx Clocking Wizard Driver -# - -config COMMON_CLK_XLNX_CLKWZRD - tristate "Xilinx Clocking Wizard" - depends on COMMON_CLK && OF && IOMEM - help - Support for the Xilinx Clocking Wizard IP core clock generator. diff --git a/drivers/staging/clocking-wizard/Makefile b/drivers/staging/clocking-wizard/Makefile deleted file mode 100644 index b1f9152..0000000 --- a/drivers/staging/clocking-wizard/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -obj-$(CONFIG_COMMON_CLK_XLNX_CLKWZRD) += clk-xlnx-clock-wizard.o diff --git a/drivers/staging/clocking-wizard/TODO b/drivers/staging/clocking-wizard/TODO deleted file mode 100644 index ebe99db..0000000 --- a/drivers/staging/clocking-wizard/TODO +++ /dev/null @@ -1,12 +0,0 @@ -TODO: - - support for fractional multiplier - - support for fractional divider (output 0 only) - - support for set_rate() operations (may benefit from Stephen Boyd's - refactoring of the clk primitives: https://lkml.org/lkml/2014/9/5/766) - - review arithmetic - - overflow after multiplication? - - maximize accuracy before divisions - -Patches to: - Greg Kroah-Hartman <gregkh@linuxfoundation.org> - Sören Brinkmann <soren.brinkmann@xilinx.com> diff --git a/drivers/staging/clocking-wizard/dt-binding.txt b/drivers/staging/clocking-wizard/dt-binding.txt deleted file mode 100644 index efb67ff..0000000 --- a/drivers/staging/clocking-wizard/dt-binding.txt +++ /dev/null @@ -1,30 +0,0 @@ -Binding for Xilinx Clocking Wizard IP Core - -This binding uses the common clock binding[1]. Details about the devices can be -found in the product guide[2]. - -[1] Documentation/devicetree/bindings/clock/clock-bindings.txt -[2] Clocking Wizard Product Guide -https://www.xilinx.com/support/documentation/ip_documentation/clk_wiz/v5_1/pg065-clk-wiz.pdf - -Required properties: - - compatible: Must be 'xlnx,clocking-wizard' - - reg: Base and size of the cores register space - - clocks: Handle to input clock - - clock-names: Tuple containing 'clk_in1' and 's_axi_aclk' - - clock-output-names: Names for the output clocks - -Optional properties: - - speed-grade: Speed grade of the device (valid values are 1..3) - -Example: - clock-generator@40040000 { - reg = <0x40040000 0x1000>; - compatible = "xlnx,clocking-wizard"; - speed-grade = <1>; - clock-names = "clk_in1", "s_axi_aclk"; - clocks = <&clkc 15>, <&clkc 15>; - clock-output-names = "clk_out0", "clk_out1", "clk_out2", - "clk_out3", "clk_out4", "clk_out5", - "clk_out6", "clk_out7"; - }; -- 2.1.1 _______________________________________________ devel mailing list devel@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
next prev parent reply other threads:[~2021-02-24 14:19 UTC|newest] Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-02-24 13:10 [PATCH v10 0/9] clk: clocking-wizard: driver updates Shubhrajyoti Datta 2021-02-24 13:10 ` Shubhrajyoti Datta 2021-02-24 13:10 ` [PATCH v10 1/9] staging: clocking-wizard: Fix kernel-doc warning Shubhrajyoti Datta 2021-02-24 13:10 ` Shubhrajyoti Datta 2021-02-24 13:10 ` [PATCH v10 2/9] staging: clocking-wizard: Rename speed-grade to xlnx,speed-grade Shubhrajyoti Datta 2021-02-24 13:10 ` [PATCH v10 2/9] staging: clocking-wizard: Rename speed-grade to xlnx, speed-grade Shubhrajyoti Datta 2021-02-24 13:10 ` [PATCH v10 3/9] staging: clocking-wizard: Update the fixed factor divisors Shubhrajyoti Datta 2021-02-24 13:10 ` Shubhrajyoti Datta 2021-02-24 13:10 ` [PATCH v10 4/9] staging: clocking-wizard: Allow changing of parent rate for single output Shubhrajyoti Datta 2021-02-24 13:10 ` Shubhrajyoti Datta 2021-02-24 13:10 ` [PATCH v10 5/9] staging: clocking-wizard: Add support for dynamic reconfiguration Shubhrajyoti Datta 2021-02-24 13:10 ` Shubhrajyoti Datta 2021-02-24 13:10 ` [PATCH v10 6/9] staging: clocking-wizard: Add support for fractional support Shubhrajyoti Datta 2021-02-24 13:10 ` Shubhrajyoti Datta 2021-02-24 13:10 ` [PATCH v10 7/9] staging: clocking-wizard: Remove the hardcoding of the clock outputs Shubhrajyoti Datta 2021-02-24 13:10 ` Shubhrajyoti Datta 2021-02-24 13:10 ` [PATCH v10 8/9] dt-bindings: add documentation of xilinx clocking wizard Shubhrajyoti Datta 2021-02-24 13:10 ` Shubhrajyoti Datta 2021-03-06 20:20 ` Rob Herring 2021-03-06 20:20 ` Rob Herring 2021-04-08 10:26 ` Shubhrajyoti Datta 2021-04-08 10:26 ` Shubhrajyoti Datta 2021-04-08 10:40 ` Michal Simek 2021-04-08 10:40 ` Michal Simek 2021-04-09 23:32 ` Stephen Boyd 2021-04-09 23:32 ` Stephen Boyd 2021-05-13 6:48 ` Shubhrajyoti Datta 2021-05-13 6:48 ` Shubhrajyoti Datta 2021-02-24 13:10 ` Shubhrajyoti Datta [this message] 2021-02-24 13:10 ` [PATCH v10 9/9] clk: clock-wizard: Add the clockwizard to clk directory Shubhrajyoti Datta
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