From: <bpeled@marvell.com> To: <thomas.petazzoni@bootlin.com>, <lorenzo.pieralisi@arm.com>, <bhelgaas@google.com> Cc: <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <devicetree@vger.kernel.org>, <linux-pci@vger.kernel.org>, <sebastian.hesselbarth@gmail.com>, <gregory.clement@bootlin.com>, <andrew@lunn.ch>, <robh+dt@kernel.org>, <mw@semihalf.com>, <jaz@semihalf.com>, <kostap@marvell.com>, <nadavh@marvell.com>, <stefanc@marvell.com>, <oferh@marvell.com>, <bpeled@marvell.com> Subject: [”PATCH” 2/5] PCI: armada8k: Add link-down handle Date: Mon, 12 Apr 2021 18:30:53 +0300 [thread overview] Message-ID: <1618241456-27200-3-git-send-email-bpeled@marvell.com> (raw) In-Reply-To: <1618241456-27200-1-git-send-email-bpeled@marvell.com> From: Ben Peled <bpeled@marvell.com> In PCIE ISR routine caused by RST_LINK_DOWN we schedule work to handle the link-down procedure. Link-down procedure will: 1. Remove PCIe bus 2. Reset the MAC 3. Reconfigure link back up 4. Rescan PCIe bus Signed-off-by: Ben Peled <bpeled@marvell.com> --- drivers/pci/controller/dwc/pcie-armada8k.c | 68 ++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-armada8k.c b/drivers/pci/controller/dwc/pcie-armada8k.c index b2278b1..4eb8607 100644 --- a/drivers/pci/controller/dwc/pcie-armada8k.c +++ b/drivers/pci/controller/dwc/pcie-armada8k.c @@ -22,6 +22,8 @@ #include <linux/resource.h> #include <linux/of_pci.h> #include <linux/of_irq.h> +#include <linux/mfd/syscon.h> +#include <linux/regmap.h> #include "pcie-designware.h" @@ -33,6 +35,9 @@ struct armada8k_pcie { struct clk *clk_reg; struct phy *phy[ARMADA8K_PCIE_MAX_LANES]; unsigned int phy_count; + struct regmap *sysctrl_base; + u32 mac_rest_bitmask; + struct work_struct recover_link_work; }; #define PCIE_VENDOR_REGS_OFFSET 0x8000 @@ -73,6 +78,8 @@ struct armada8k_pcie { #define AX_USER_DOMAIN_MASK 0x3 #define AX_USER_DOMAIN_SHIFT 4 +#define UNIT_SOFT_RESET_CONFIG_REG 0x268 + #define to_armada8k_pcie(x) dev_get_drvdata((x)->dev) static void armada8k_pcie_disable_phys(struct armada8k_pcie *pcie) @@ -224,6 +231,49 @@ static int armada8k_pcie_host_init(struct pcie_port *pp) return 0; } +static void armada8k_pcie_recover_link(struct work_struct *ws) +{ + struct armada8k_pcie *pcie = container_of(ws, struct armada8k_pcie, recover_link_work); + struct pcie_port *pp = &pcie->pci->pp; + struct pci_bus *bus = pp->bridge->bus; + struct pci_dev *root_port; + int ret; + + root_port = pci_get_slot(bus, 0); + if (!root_port) { + dev_err(pcie->pci->dev, "failed to get root port\n"); + return; + } + pci_lock_rescan_remove(); + pci_stop_and_remove_bus_device(root_port); + /* + * Sleep needed to make sure all pcie transactions and access + * are flushed before resetting the mac + */ + msleep(100); + + /* Reset mac */ + regmap_update_bits_base(pcie->sysctrl_base, UNIT_SOFT_RESET_CONFIG_REG, + pcie->mac_rest_bitmask, 0, NULL, false, true); + udelay(1); + regmap_update_bits_base(pcie->sysctrl_base, UNIT_SOFT_RESET_CONFIG_REG, + pcie->mac_rest_bitmask, pcie->mac_rest_bitmask, + NULL, false, true); + udelay(1); + ret = armada8k_pcie_host_init(pp); + if (ret) { + dev_err(pcie->pci->dev, "failed to initialize host: %d\n", ret); + pci_unlock_rescan_remove(); + pci_dev_put(root_port); + return; + } + + bus = NULL; + while ((bus = pci_find_next_bus(bus)) != NULL) + pci_rescan_bus(bus); + pci_unlock_rescan_remove(); + pci_dev_put(root_port); +} static irqreturn_t armada8k_pcie_irq_handler(int irq, void *arg) { @@ -262,6 +312,9 @@ static irqreturn_t armada8k_pcie_irq_handler(int irq, void *arg) * initiate a link retrain. If link retrains were * possible, that is. */ + if (pcie->sysctrl_base && pcie->mac_rest_bitmask) + schedule_work(&pcie->recover_link_work); + dev_dbg(pci->dev, "%s: link went down\n", __func__); } @@ -330,6 +383,8 @@ static int armada8k_pcie_probe(struct platform_device *pdev) pcie->pci = pci; + INIT_WORK(&pcie->recover_link_work, armada8k_pcie_recover_link); + pcie->clk = devm_clk_get(dev, NULL); if (IS_ERR(pcie->clk)) return PTR_ERR(pcie->clk); @@ -357,6 +412,19 @@ static int armada8k_pcie_probe(struct platform_device *pdev) goto fail_clkreg; } + pcie->sysctrl_base = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, + "marvell,system-controller"); + if (IS_ERR(pcie->sysctrl_base)) { + dev_warn(dev, "failed to find marvell,system-controller\n"); + pcie->sysctrl_base = 0x0; + } + + ret = of_property_read_u32(pdev->dev.of_node, "marvell,mac-reset-bit-mask", + &pcie->mac_rest_bitmask); + if (ret < 0) { + dev_warn(dev, "couldn't find mac reset bit mask: %d\n", ret); + pcie->mac_rest_bitmask = 0x0; + } ret = armada8k_pcie_setup_phys(pcie); if (ret) goto fail_clkreg; -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: <bpeled@marvell.com> To: <thomas.petazzoni@bootlin.com>, <lorenzo.pieralisi@arm.com>, <bhelgaas@google.com> Cc: <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <devicetree@vger.kernel.org>, <linux-pci@vger.kernel.org>, <sebastian.hesselbarth@gmail.com>, <gregory.clement@bootlin.com>, <andrew@lunn.ch>, <robh+dt@kernel.org>, <mw@semihalf.com>, <jaz@semihalf.com>, <kostap@marvell.com>, <nadavh@marvell.com>, <stefanc@marvell.com>, <oferh@marvell.com>, <bpeled@marvell.com> Subject: [”PATCH” 2/5] PCI: armada8k: Add link-down handle Date: Mon, 12 Apr 2021 18:30:53 +0300 [thread overview] Message-ID: <1618241456-27200-3-git-send-email-bpeled@marvell.com> (raw) In-Reply-To: <1618241456-27200-1-git-send-email-bpeled@marvell.com> From: Ben Peled <bpeled@marvell.com> In PCIE ISR routine caused by RST_LINK_DOWN we schedule work to handle the link-down procedure. Link-down procedure will: 1. Remove PCIe bus 2. Reset the MAC 3. Reconfigure link back up 4. Rescan PCIe bus Signed-off-by: Ben Peled <bpeled@marvell.com> --- drivers/pci/controller/dwc/pcie-armada8k.c | 68 ++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-armada8k.c b/drivers/pci/controller/dwc/pcie-armada8k.c index b2278b1..4eb8607 100644 --- a/drivers/pci/controller/dwc/pcie-armada8k.c +++ b/drivers/pci/controller/dwc/pcie-armada8k.c @@ -22,6 +22,8 @@ #include <linux/resource.h> #include <linux/of_pci.h> #include <linux/of_irq.h> +#include <linux/mfd/syscon.h> +#include <linux/regmap.h> #include "pcie-designware.h" @@ -33,6 +35,9 @@ struct armada8k_pcie { struct clk *clk_reg; struct phy *phy[ARMADA8K_PCIE_MAX_LANES]; unsigned int phy_count; + struct regmap *sysctrl_base; + u32 mac_rest_bitmask; + struct work_struct recover_link_work; }; #define PCIE_VENDOR_REGS_OFFSET 0x8000 @@ -73,6 +78,8 @@ struct armada8k_pcie { #define AX_USER_DOMAIN_MASK 0x3 #define AX_USER_DOMAIN_SHIFT 4 +#define UNIT_SOFT_RESET_CONFIG_REG 0x268 + #define to_armada8k_pcie(x) dev_get_drvdata((x)->dev) static void armada8k_pcie_disable_phys(struct armada8k_pcie *pcie) @@ -224,6 +231,49 @@ static int armada8k_pcie_host_init(struct pcie_port *pp) return 0; } +static void armada8k_pcie_recover_link(struct work_struct *ws) +{ + struct armada8k_pcie *pcie = container_of(ws, struct armada8k_pcie, recover_link_work); + struct pcie_port *pp = &pcie->pci->pp; + struct pci_bus *bus = pp->bridge->bus; + struct pci_dev *root_port; + int ret; + + root_port = pci_get_slot(bus, 0); + if (!root_port) { + dev_err(pcie->pci->dev, "failed to get root port\n"); + return; + } + pci_lock_rescan_remove(); + pci_stop_and_remove_bus_device(root_port); + /* + * Sleep needed to make sure all pcie transactions and access + * are flushed before resetting the mac + */ + msleep(100); + + /* Reset mac */ + regmap_update_bits_base(pcie->sysctrl_base, UNIT_SOFT_RESET_CONFIG_REG, + pcie->mac_rest_bitmask, 0, NULL, false, true); + udelay(1); + regmap_update_bits_base(pcie->sysctrl_base, UNIT_SOFT_RESET_CONFIG_REG, + pcie->mac_rest_bitmask, pcie->mac_rest_bitmask, + NULL, false, true); + udelay(1); + ret = armada8k_pcie_host_init(pp); + if (ret) { + dev_err(pcie->pci->dev, "failed to initialize host: %d\n", ret); + pci_unlock_rescan_remove(); + pci_dev_put(root_port); + return; + } + + bus = NULL; + while ((bus = pci_find_next_bus(bus)) != NULL) + pci_rescan_bus(bus); + pci_unlock_rescan_remove(); + pci_dev_put(root_port); +} static irqreturn_t armada8k_pcie_irq_handler(int irq, void *arg) { @@ -262,6 +312,9 @@ static irqreturn_t armada8k_pcie_irq_handler(int irq, void *arg) * initiate a link retrain. If link retrains were * possible, that is. */ + if (pcie->sysctrl_base && pcie->mac_rest_bitmask) + schedule_work(&pcie->recover_link_work); + dev_dbg(pci->dev, "%s: link went down\n", __func__); } @@ -330,6 +383,8 @@ static int armada8k_pcie_probe(struct platform_device *pdev) pcie->pci = pci; + INIT_WORK(&pcie->recover_link_work, armada8k_pcie_recover_link); + pcie->clk = devm_clk_get(dev, NULL); if (IS_ERR(pcie->clk)) return PTR_ERR(pcie->clk); @@ -357,6 +412,19 @@ static int armada8k_pcie_probe(struct platform_device *pdev) goto fail_clkreg; } + pcie->sysctrl_base = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, + "marvell,system-controller"); + if (IS_ERR(pcie->sysctrl_base)) { + dev_warn(dev, "failed to find marvell,system-controller\n"); + pcie->sysctrl_base = 0x0; + } + + ret = of_property_read_u32(pdev->dev.of_node, "marvell,mac-reset-bit-mask", + &pcie->mac_rest_bitmask); + if (ret < 0) { + dev_warn(dev, "couldn't find mac reset bit mask: %d\n", ret); + pcie->mac_rest_bitmask = 0x0; + } ret = armada8k_pcie_setup_phys(pcie); if (ret) goto fail_clkreg; -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-04-12 15:31 UTC|newest] Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-04-12 15:30 [”PATCH” 0/5] Asynchronous linkdown recovery bpeled 2021-04-12 15:30 ` bpeled 2021-04-12 15:30 ` [”PATCH” 1/5] PCI: armada8k: Disable LTSSM on link down interrupts bpeled 2021-04-12 15:30 ` bpeled 2021-04-12 15:30 ` bpeled [this message] 2021-04-12 15:30 ` [”PATCH” 2/5] PCI: armada8k: Add link-down handle bpeled 2021-04-14 12:42 ` Jonathan Cameron 2021-04-14 12:42 ` Jonathan Cameron 2021-04-27 7:07 ` [EXT] " Ben Peled 2021-04-27 7:07 ` Ben Peled 2021-04-12 15:30 ` [”PATCH” 3/5] dt-bindings: pci: add system controller and MAC reset bit to Armada 7K/8K controller bindings bpeled 2021-04-12 15:30 ` bpeled 2021-04-13 15:10 ` Rob Herring 2021-04-13 15:10 ` Rob Herring 2021-04-26 15:58 ` [EXT] " Ben Peled 2021-04-26 15:58 ` Ben Peled 2021-04-12 15:30 ` [”PATCH” 4/5] arm64: dts: marvell: add pcie mac reset to pcie bpeled 2021-04-12 15:30 ` bpeled 2021-04-12 15:30 ` [”PATCH” 5/5] PCI: armada8k: add device reset to link-down handle bpeled 2021-04-12 15:30 ` bpeled 2021-04-13 10:14 ` [”PATCH” 0/5] Asynchronous linkdown recovery Ben Peled 2021-04-13 10:14 ` Ben Peled
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