From: <bpeled@marvell.com> To: <thomas.petazzoni@bootlin.com>, <lorenzo.pieralisi@arm.com>, <bhelgaas@google.com> Cc: <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <devicetree@vger.kernel.org>, <linux-pci@vger.kernel.org>, <sebastian.hesselbarth@gmail.com>, <gregory.clement@bootlin.com>, <andrew@lunn.ch>, <robh+dt@kernel.org>, <mw@semihalf.com>, <jaz@semihalf.com>, <kostap@marvell.com>, <nadavh@marvell.com>, <stefanc@marvell.com>, <oferh@marvell.com>, Ben Peled <bpeled@marvell.com> Subject: [”PATCH” v2 5/5] PCI: armada8k: add device reset to link-down handle Date: Wed, 14 Apr 2021 16:20:54 +0300 [thread overview] Message-ID: <1618406454-7953-6-git-send-email-bpeled@marvell.com> (raw) In-Reply-To: <1618406454-7953-1-git-send-email-bpeled@marvell.com> From: Ben Peled <bpeled@marvell.com> Added pcie reset via gpio support as described in the designware-pcie.txt DT binding document. In cases link down cause still exist in device. The device need to be reset to reestablish the link. If reset-gpio pin provided in the device tree, then the linkdown handle resets the device before reestablishing link. Signed-off-by: Ben Peled <bpeled@marvell.com> --- drivers/pci/controller/dwc/pcie-armada8k.c | 24 ++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-armada8k.c b/drivers/pci/controller/dwc/pcie-armada8k.c index 34b253c..04bba97 100644 --- a/drivers/pci/controller/dwc/pcie-armada8k.c +++ b/drivers/pci/controller/dwc/pcie-armada8k.c @@ -24,6 +24,7 @@ #include <linux/of_irq.h> #include <linux/mfd/syscon.h> #include <linux/regmap.h> +#include <linux/of_gpio.h> #include "pcie-designware.h" @@ -38,6 +39,8 @@ struct armada8k_pcie { struct regmap *sysctrl_base; u32 mac_rest_bitmask; struct work_struct recover_link_work; + enum of_gpio_flags flags; + struct gpio_desc *reset_gpio; }; #define PCIE_VENDOR_REGS_OFFSET 0x8000 @@ -247,9 +250,18 @@ static void armada8k_pcie_recover_link(struct work_struct *ws) } pci_lock_rescan_remove(); pci_stop_and_remove_bus_device(root_port); + /* Reset device if reset gpio is set */ + if (pcie->reset_gpio) { + /* assert and then deassert the reset signal */ + gpiod_set_value_cansleep(pcie->reset_gpio, 0); + msleep(100); + gpiod_set_value_cansleep(pcie->reset_gpio, + (pcie->flags & OF_GPIO_ACTIVE_LOW) ? 0 : 1); + } /* - * Sleep needed to make sure all pcie transactions and access - * are flushed before resetting the mac + * Sleep used for two reasons. + * First make sure all pcie transactions and access are flushed before resetting the mac + * and second to make sure pci device is ready in case we reset the device */ msleep(100); @@ -369,6 +381,7 @@ static int armada8k_pcie_probe(struct platform_device *pdev) struct armada8k_pcie *pcie; struct device *dev = &pdev->dev; struct resource *base; + int reset_gpio; int ret; pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); @@ -413,6 +426,13 @@ static int armada8k_pcie_probe(struct platform_device *pdev) goto fail_clkreg; } + /* Config reset gpio for pcie if the reset connected to gpio */ + reset_gpio = of_get_named_gpio_flags(pdev->dev.of_node, + "reset-gpios", 0, + &pcie->flags); + if (gpio_is_valid(reset_gpio)) + pcie->reset_gpio = gpio_to_desc(reset_gpio); + pcie->sysctrl_base = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "marvell,system-controller"); if (IS_ERR(pcie->sysctrl_base)) { -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: <bpeled@marvell.com> To: <thomas.petazzoni@bootlin.com>, <lorenzo.pieralisi@arm.com>, <bhelgaas@google.com> Cc: <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <devicetree@vger.kernel.org>, <linux-pci@vger.kernel.org>, <sebastian.hesselbarth@gmail.com>, <gregory.clement@bootlin.com>, <andrew@lunn.ch>, <robh+dt@kernel.org>, <mw@semihalf.com>, <jaz@semihalf.com>, <kostap@marvell.com>, <nadavh@marvell.com>, <stefanc@marvell.com>, <oferh@marvell.com>, Ben Peled <bpeled@marvell.com> Subject: [”PATCH” v2 5/5] PCI: armada8k: add device reset to link-down handle Date: Wed, 14 Apr 2021 16:20:54 +0300 [thread overview] Message-ID: <1618406454-7953-6-git-send-email-bpeled@marvell.com> (raw) In-Reply-To: <1618406454-7953-1-git-send-email-bpeled@marvell.com> From: Ben Peled <bpeled@marvell.com> Added pcie reset via gpio support as described in the designware-pcie.txt DT binding document. In cases link down cause still exist in device. The device need to be reset to reestablish the link. If reset-gpio pin provided in the device tree, then the linkdown handle resets the device before reestablishing link. Signed-off-by: Ben Peled <bpeled@marvell.com> --- drivers/pci/controller/dwc/pcie-armada8k.c | 24 ++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-armada8k.c b/drivers/pci/controller/dwc/pcie-armada8k.c index 34b253c..04bba97 100644 --- a/drivers/pci/controller/dwc/pcie-armada8k.c +++ b/drivers/pci/controller/dwc/pcie-armada8k.c @@ -24,6 +24,7 @@ #include <linux/of_irq.h> #include <linux/mfd/syscon.h> #include <linux/regmap.h> +#include <linux/of_gpio.h> #include "pcie-designware.h" @@ -38,6 +39,8 @@ struct armada8k_pcie { struct regmap *sysctrl_base; u32 mac_rest_bitmask; struct work_struct recover_link_work; + enum of_gpio_flags flags; + struct gpio_desc *reset_gpio; }; #define PCIE_VENDOR_REGS_OFFSET 0x8000 @@ -247,9 +250,18 @@ static void armada8k_pcie_recover_link(struct work_struct *ws) } pci_lock_rescan_remove(); pci_stop_and_remove_bus_device(root_port); + /* Reset device if reset gpio is set */ + if (pcie->reset_gpio) { + /* assert and then deassert the reset signal */ + gpiod_set_value_cansleep(pcie->reset_gpio, 0); + msleep(100); + gpiod_set_value_cansleep(pcie->reset_gpio, + (pcie->flags & OF_GPIO_ACTIVE_LOW) ? 0 : 1); + } /* - * Sleep needed to make sure all pcie transactions and access - * are flushed before resetting the mac + * Sleep used for two reasons. + * First make sure all pcie transactions and access are flushed before resetting the mac + * and second to make sure pci device is ready in case we reset the device */ msleep(100); @@ -369,6 +381,7 @@ static int armada8k_pcie_probe(struct platform_device *pdev) struct armada8k_pcie *pcie; struct device *dev = &pdev->dev; struct resource *base; + int reset_gpio; int ret; pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); @@ -413,6 +426,13 @@ static int armada8k_pcie_probe(struct platform_device *pdev) goto fail_clkreg; } + /* Config reset gpio for pcie if the reset connected to gpio */ + reset_gpio = of_get_named_gpio_flags(pdev->dev.of_node, + "reset-gpios", 0, + &pcie->flags); + if (gpio_is_valid(reset_gpio)) + pcie->reset_gpio = gpio_to_desc(reset_gpio); + pcie->sysctrl_base = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "marvell,system-controller"); if (IS_ERR(pcie->sysctrl_base)) { -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-04-14 13:21 UTC|newest] Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-04-14 13:20 [”PATCH” v2 0/5] Asynchronous linkdown recovery bpeled 2021-04-14 13:20 ` bpeled 2021-04-14 13:20 ` [”PATCH” v2 1/5] PCI: armada8k: Disable LTSSM on link down interrupts bpeled 2021-04-14 13:20 ` bpeled 2021-12-09 11:28 ` Pali Rohár 2021-12-09 11:28 ` Pali Rohár 2021-04-14 13:20 ` [”PATCH” v2 2/5] PCI: armada8k: Add link-down handle bpeled 2021-04-14 13:20 ` bpeled 2021-04-17 10:51 ` Pali Rohár 2021-04-17 10:51 ` Pali Rohár 2021-04-14 13:20 ` [”PATCH” v2 3/5] dt-bindings: pci: add system controller and MAC reset bit to Armada 7K/8K controller bindings bpeled 2021-04-14 13:20 ` bpeled 2021-04-15 21:20 ` Rob Herring 2021-04-15 21:20 ` Rob Herring 2021-04-14 13:20 ` [”PATCH” v2 4/5] arm64: dts: marvell: add pcie mac reset to pcie bpeled 2021-04-14 13:20 ` bpeled 2021-04-14 13:20 ` bpeled [this message] 2021-04-14 13:20 ` [”PATCH” v2 5/5] PCI: armada8k: add device reset to link-down handle bpeled
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