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From: Alain Volmat <alain.volmat@foss.st.com>
To: <broonie@kernel.org>, <amelie.delaunay@foss.st.com>
Cc: <mcoquelin.stm32@gmail.com>, <alexandre.torgue@foss.st.com>,
	<linux-spi@vger.kernel.org>,
	<linux-stm32@st-md-mailman.stormreply.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <fabrice.gasnier@foss.st.com>,
	<alain.volmat@foss.st.com>
Subject: [PATCH 2/6] spi: stm32h7: fix full duplex irq handler handling
Date: Wed, 30 Jun 2021 10:45:19 +0200	[thread overview]
Message-ID: <1625042723-661-3-git-send-email-alain.volmat@foss.st.com> (raw)
In-Reply-To: <1625042723-661-1-git-send-email-alain.volmat@foss.st.com>

In case of Full-Duplex mode, DXP flag is set when RXP and TXP flags are
set. But to avoid 2 different handlings, just add TXP and RXP flag in
the mask instead of DXP, and then keep the initial handling of TXP and
RXP events.
Also rephrase comment about EOTIE which is one of the interrupt enable
bits. It is not triggered by any event.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
---
 drivers/spi/spi-stm32.c | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c
index fe35c5cfb820..4dbd5cbe0c11 100644
--- a/drivers/spi/spi-stm32.c
+++ b/drivers/spi/spi-stm32.c
@@ -886,15 +886,18 @@ static irqreturn_t stm32h7_spi_irq_thread(int irq, void *dev_id)
 	ier = readl_relaxed(spi->base + STM32H7_SPI_IER);
 
 	mask = ier;
-	/* EOTIE is triggered on EOT, SUSP and TXC events. */
+	/*
+	 * EOTIE enables irq from EOT, SUSP and TXC events. We need to set
+	 * SUSP to acknowledge it later. TXC is automatically cleared
+	 */
+
 	mask |= STM32H7_SPI_SR_SUSP;
 	/*
-	 * When TXTF is set, DXPIE and TXPIE are cleared. So in case of
-	 * Full-Duplex, need to poll RXP event to know if there are remaining
-	 * data, before disabling SPI.
+	 * DXPIE is set in Full-Duplex, one IT will be raised if TXP and RXP
+	 * are set. So in case of Full-Duplex, need to poll TXP and RXP event.
 	 */
-	if (spi->rx_buf && !spi->cur_usedma)
-		mask |= STM32H7_SPI_SR_RXP;
+	if ((spi->cur_comm == SPI_FULL_DUPLEX) && !spi->cur_usedma)
+		mask |= STM32H7_SPI_SR_TXP | STM32H7_SPI_SR_RXP;
 
 	if (!(sr & mask)) {
 		dev_warn(spi->dev, "spurious IT (sr=0x%08x, ier=0x%08x)\n",
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Alain Volmat <alain.volmat@foss.st.com>
To: <broonie@kernel.org>, <amelie.delaunay@foss.st.com>
Cc: <mcoquelin.stm32@gmail.com>, <alexandre.torgue@foss.st.com>,
	<linux-spi@vger.kernel.org>,
	<linux-stm32@st-md-mailman.stormreply.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <fabrice.gasnier@foss.st.com>,
	<alain.volmat@foss.st.com>
Subject: [PATCH 2/6] spi: stm32h7: fix full duplex irq handler handling
Date: Wed, 30 Jun 2021 10:45:19 +0200	[thread overview]
Message-ID: <1625042723-661-3-git-send-email-alain.volmat@foss.st.com> (raw)
In-Reply-To: <1625042723-661-1-git-send-email-alain.volmat@foss.st.com>

In case of Full-Duplex mode, DXP flag is set when RXP and TXP flags are
set. But to avoid 2 different handlings, just add TXP and RXP flag in
the mask instead of DXP, and then keep the initial handling of TXP and
RXP events.
Also rephrase comment about EOTIE which is one of the interrupt enable
bits. It is not triggered by any event.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
---
 drivers/spi/spi-stm32.c | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c
index fe35c5cfb820..4dbd5cbe0c11 100644
--- a/drivers/spi/spi-stm32.c
+++ b/drivers/spi/spi-stm32.c
@@ -886,15 +886,18 @@ static irqreturn_t stm32h7_spi_irq_thread(int irq, void *dev_id)
 	ier = readl_relaxed(spi->base + STM32H7_SPI_IER);
 
 	mask = ier;
-	/* EOTIE is triggered on EOT, SUSP and TXC events. */
+	/*
+	 * EOTIE enables irq from EOT, SUSP and TXC events. We need to set
+	 * SUSP to acknowledge it later. TXC is automatically cleared
+	 */
+
 	mask |= STM32H7_SPI_SR_SUSP;
 	/*
-	 * When TXTF is set, DXPIE and TXPIE are cleared. So in case of
-	 * Full-Duplex, need to poll RXP event to know if there are remaining
-	 * data, before disabling SPI.
+	 * DXPIE is set in Full-Duplex, one IT will be raised if TXP and RXP
+	 * are set. So in case of Full-Duplex, need to poll TXP and RXP event.
 	 */
-	if (spi->rx_buf && !spi->cur_usedma)
-		mask |= STM32H7_SPI_SR_RXP;
+	if ((spi->cur_comm == SPI_FULL_DUPLEX) && !spi->cur_usedma)
+		mask |= STM32H7_SPI_SR_TXP | STM32H7_SPI_SR_RXP;
 
 	if (!(sr & mask)) {
 		dev_warn(spi->dev, "spurious IT (sr=0x%08x, ier=0x%08x)\n",
-- 
2.25.1


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  parent reply	other threads:[~2021-06-30  8:47 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-30  8:45 [PATCH 0/6] spi: stm32: various fixes & cleanup Alain Volmat
2021-06-30  8:45 ` Alain Volmat
2021-06-30  8:45 ` [PATCH 1/6] spi: stm32: fixes pm_runtime calls in probe/remove Alain Volmat
2021-06-30  8:45   ` Alain Volmat
2021-06-30 12:34   ` Mark Brown
2021-06-30 12:34     ` Mark Brown
2021-06-30  8:45 ` Alain Volmat [this message]
2021-06-30  8:45   ` [PATCH 2/6] spi: stm32h7: fix full duplex irq handler handling Alain Volmat
2021-06-30  8:45 ` [PATCH 3/6] Revert "spi: stm32: properly handle 0 byte transfer" Alain Volmat
2021-06-30  8:45   ` Alain Volmat
2021-06-30 12:34   ` Mark Brown
2021-06-30 12:34     ` Mark Brown
2021-06-30  8:45 ` [PATCH 4/6] spi: stm32h7: rework rx fifo read function Alain Volmat
2021-06-30  8:45   ` Alain Volmat
2021-06-30  8:45 ` [PATCH 5/6] spi: stm32h7: don't wait for EOT and flush fifo on disable Alain Volmat
2021-06-30  8:45   ` Alain Volmat
2021-06-30  8:45 ` [PATCH 6/6] spi: stm32: finalize message either on dma callback or EOT Alain Volmat
2021-06-30  8:45   ` Alain Volmat
2021-06-30 10:10 ` [PATCH 0/6] spi: stm32: various fixes & cleanup Amelie DELAUNAY
2021-06-30 10:10   ` Amelie DELAUNAY
2021-06-30 16:10 ` (subset) " Mark Brown
2021-06-30 16:10   ` Mark Brown

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