From: Wenpeng Liang <liangwenpeng@huawei.com>
To: <dledford@redhat.com>, <jgg@nvidia.com>
Cc: <linux-rdma@vger.kernel.org>, <linuxarm@huawei.com>,
<liangwenpeng@huawei.com>
Subject: [PATCH for-next 2/3] RDMA/hns: Enable stash feature of HIP09
Date: Sat, 21 Aug 2021 17:53:26 +0800 [thread overview]
Message-ID: <1629539607-33217-3-git-send-email-liangwenpeng@huawei.com> (raw)
In-Reply-To: <1629539607-33217-1-git-send-email-liangwenpeng@huawei.com>
From: Yixing Liu <liuyixing1@huawei.com>
The stash feature is enabled by default on HIP09.
Fixes: f93c39bc9547 ("RDMA/hns: Add support for QP stash")
Fixes: bfefae9f108d ("RDMA/hns: Add support for CQ stash")
Signed-off-by: Yixing Liu <liuyixing1@huawei.com>
Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
---
drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 514473f..cbc8739 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -2004,6 +2004,7 @@ static void set_default_caps(struct hns_roce_dev *hr_dev)
caps->gid_table_len[0] = HNS_ROCE_V2_GID_INDEX_NUM;
if (hr_dev->pci_dev->revision >= PCI_REVISION_ID_HIP09) {
+ caps->flags |= HNS_ROCE_CAP_FLAG_STASH;
caps->max_sq_inline = HNS_ROCE_V3_MAX_SQ_INLINE;
} else {
caps->max_sq_inline = HNS_ROCE_V2_MAX_SQ_INLINE;
--
2.8.1
next prev parent reply other threads:[~2021-08-21 9:57 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-21 9:53 [PATCH for-next 0/3] Enable or remove hardware features Wenpeng Liang
2021-08-21 9:53 ` [PATCH for-next 1/3] RDMA/hns: Remove unsupport cmdq mode Wenpeng Liang
2021-08-21 9:53 ` Wenpeng Liang [this message]
2021-08-21 9:53 ` [PATCH for-next 3/3] RDMA/hns: Ownerbit mode add control field Wenpeng Liang
2021-08-23 16:54 ` [PATCH for-next 0/3] Enable or remove hardware features Jason Gunthorpe
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