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From: Sameer Pujar <spujar@nvidia.com>
To: <vkoul@kernel.org>, <jonathanh@nvidia.com>,
	<ldewangan@nvidia.com>, <thierry.reding@gmail.com>
Cc: <dmaengine@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, Sameer Pujar <spujar@nvidia.com>
Subject: [PATCH 2/3] dmaengine: tegra210-adma: Add description for 'adma_get_burst_config'
Date: Mon, 30 Aug 2021 15:07:00 +0530	[thread overview]
Message-ID: <1630316221-9728-3-git-send-email-spujar@nvidia.com> (raw)
In-Reply-To: <1630316221-9728-1-git-send-email-spujar@nvidia.com>

Trivial change to add description for 'adma_get_burst_config' in chip
data structure.

Fixes: 433de642a76c ("dmaengine: tegra210-adma: add support for Tegra186/Tegra194")
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
---
 drivers/dma/tegra210-adma.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/dma/tegra210-adma.c b/drivers/dma/tegra210-adma.c
index caf200e..03f9776 100644
--- a/drivers/dma/tegra210-adma.c
+++ b/drivers/dma/tegra210-adma.c
@@ -73,6 +73,7 @@ struct tegra_adma;
 
 /*
  * struct tegra_adma_chip_data - Tegra chip specific data
+ * @adma_get_burst_config: Function callback used to set DMA burst size.
  * @global_reg_offset: Register offset of DMA global register.
  * @global_int_clear: Register offset of DMA global interrupt clear.
  * @ch_req_tx_shift: Register offset for AHUB transmit channel select.
-- 
2.7.4


  parent reply	other threads:[~2021-08-30  9:37 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-30  9:36 [PATCH 0/3] Few Tegra210 ADMA fixes Sameer Pujar
2021-08-30  9:36 ` [PATCH 1/3] dmaengine: tegra210-adma: Re-order 'has_outstanding_reqs' member Sameer Pujar
2021-08-30  9:37 ` Sameer Pujar [this message]
2021-08-30  9:37 ` [PATCH 3/3] dmaengine: tegra210-adma: Override ADMA FIFO size Sameer Pujar

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