From: Srinivasa Rao Mandadapu <srivasam@codeaurora.org> To: agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, plai@codeaurora.org, bgoswami@codeaurora.org, perex@perex.cz, tiwai@suse.com, srinivas.kandagatla@linaro.org, rohitkr@codeaurora.org, linux-arm-msm@vger.kernel.org, alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, swboyd@chromium.org, judyhsiao@chromium.org Cc: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>, Venkata Prasad Potturu <potturu@codeaurora.org> Subject: [PATCH] ASoC: qcom: soundwire: Enable soundwire bus clock for version 1.6 Date: Fri, 1 Oct 2021 21:54:31 +0530 [thread overview] Message-ID: <1633105471-30928-1-git-send-email-srivasam@codeaurora.org> (raw) Add support for soundwire 1.6 version to gate RX/TX bus clock. Signed-off-by: Venkata Prasad Potturu <potturu@codeaurora.org> Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org> --- drivers/soundwire/qcom.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c index 0ef79d6..599b3ed 100644 --- a/drivers/soundwire/qcom.c +++ b/drivers/soundwire/qcom.c @@ -127,6 +127,7 @@ struct qcom_swrm_ctrl { struct device *dev; struct regmap *regmap; void __iomem *mmio; + char __iomem *swrm_hctl_reg; struct completion broadcast; struct completion enumeration; struct work_struct slave_work; @@ -610,6 +611,12 @@ static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl) val = FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK, ctrl->rows_index); val |= FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK, ctrl->cols_index); + if (ctrl->swrm_hctl_reg) { + val = ioread32(ctrl->swrm_hctl_reg); + val &= 0xFFFFFFFD; + iowrite32(val, ctrl->swrm_hctl_reg); + } + ctrl->reg_write(ctrl, SWRM_MCP_FRAME_CTRL_BANK_ADDR(0), val); /* Enable Auto enumeration */ @@ -1200,7 +1207,7 @@ static int qcom_swrm_probe(struct platform_device *pdev) struct qcom_swrm_ctrl *ctrl; const struct qcom_swrm_data *data; int ret; - u32 val; + int val, swrm_hctl_reg = 0; ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL); if (!ctrl) @@ -1251,6 +1258,9 @@ static int qcom_swrm_probe(struct platform_device *pdev) ctrl->bus.port_ops = &qcom_swrm_port_ops; ctrl->bus.compute_params = &qcom_swrm_compute_params; + if (!of_property_read_u32(dev->of_node, "qcom,swrm-hctl-reg", &swrm_hctl_reg)) + ctrl->swrm_hctl_reg = devm_ioremap(&pdev->dev, swrm_hctl_reg, 0x4); + ret = qcom_swrm_get_port_config(ctrl); if (ret) goto err_clk; -- Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
WARNING: multiple messages have this Message-ID (diff)
From: Srinivasa Rao Mandadapu <srivasam@codeaurora.org> To: agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, plai@codeaurora.org, bgoswami@codeaurora.org, perex@perex.cz, tiwai@suse.com, srinivas.kandagatla@linaro.org, rohitkr@codeaurora.org, linux-arm-msm@vger.kernel.org, alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, swboyd@chromium.org, judyhsiao@chromium.org Cc: Venkata Prasad Potturu <potturu@codeaurora.org>, Srinivasa Rao Mandadapu <srivasam@codeaurora.org> Subject: [PATCH] ASoC: qcom: soundwire: Enable soundwire bus clock for version 1.6 Date: Fri, 1 Oct 2021 21:54:31 +0530 [thread overview] Message-ID: <1633105471-30928-1-git-send-email-srivasam@codeaurora.org> (raw) Add support for soundwire 1.6 version to gate RX/TX bus clock. Signed-off-by: Venkata Prasad Potturu <potturu@codeaurora.org> Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org> --- drivers/soundwire/qcom.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c index 0ef79d6..599b3ed 100644 --- a/drivers/soundwire/qcom.c +++ b/drivers/soundwire/qcom.c @@ -127,6 +127,7 @@ struct qcom_swrm_ctrl { struct device *dev; struct regmap *regmap; void __iomem *mmio; + char __iomem *swrm_hctl_reg; struct completion broadcast; struct completion enumeration; struct work_struct slave_work; @@ -610,6 +611,12 @@ static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl) val = FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK, ctrl->rows_index); val |= FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK, ctrl->cols_index); + if (ctrl->swrm_hctl_reg) { + val = ioread32(ctrl->swrm_hctl_reg); + val &= 0xFFFFFFFD; + iowrite32(val, ctrl->swrm_hctl_reg); + } + ctrl->reg_write(ctrl, SWRM_MCP_FRAME_CTRL_BANK_ADDR(0), val); /* Enable Auto enumeration */ @@ -1200,7 +1207,7 @@ static int qcom_swrm_probe(struct platform_device *pdev) struct qcom_swrm_ctrl *ctrl; const struct qcom_swrm_data *data; int ret; - u32 val; + int val, swrm_hctl_reg = 0; ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL); if (!ctrl) @@ -1251,6 +1258,9 @@ static int qcom_swrm_probe(struct platform_device *pdev) ctrl->bus.port_ops = &qcom_swrm_port_ops; ctrl->bus.compute_params = &qcom_swrm_compute_params; + if (!of_property_read_u32(dev->of_node, "qcom,swrm-hctl-reg", &swrm_hctl_reg)) + ctrl->swrm_hctl_reg = devm_ioremap(&pdev->dev, swrm_hctl_reg, 0x4); + ret = qcom_swrm_get_port_config(ctrl); if (ret) goto err_clk; -- Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
next reply other threads:[~2021-10-01 16:25 UTC|newest] Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-10-01 16:24 Srinivasa Rao Mandadapu [this message] 2021-10-01 16:24 ` [PATCH] ASoC: qcom: soundwire: Enable soundwire bus clock for version 1.6 Srinivasa Rao Mandadapu 2021-10-01 17:57 ` Pierre-Louis Bossart 2021-10-05 14:13 ` Srinivasa Rao Mandadapu 2021-10-05 15:03 ` Pierre-Louis Bossart 2021-10-05 15:13 ` Srinivasa Rao Mandadapu 2021-10-05 17:01 ` Bjorn Andersson 2021-10-05 17:01 ` Bjorn Andersson 2021-10-08 5:30 ` Srinivasa Rao Mandadapu 2021-10-08 5:30 ` Srinivasa Rao Mandadapu
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