From: Srinivasa Rao Mandadapu <srivasam@codeaurora.org> To: agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, plai@codeaurora.org, bgoswami@codeaurora.org, perex@perex.cz, tiwai@suse.com, srinivas.kandagatla@linaro.org, rohitkr@codeaurora.org, linux-arm-msm@vger.kernel.org, alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, swboyd@chromium.org, judyhsiao@chromium.org Cc: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>, Venkata Prasad Potturu <potturu@codeaurora.org> Subject: [PATCH 3/3] pinctrl: qcom: Add SC7280 lpass pin configuration Date: Thu, 7 Oct 2021 19:18:39 +0530 [thread overview] Message-ID: <1633614519-26680-4-git-send-email-srivasam@codeaurora.org> (raw) In-Reply-To: <1633614519-26680-1-git-send-email-srivasam@codeaurora.org> Update pin control support for SC7280 LPASS LPI. Signed-off-by: Venkata Prasad Potturu <potturu@codeaurora.org> Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org> --- drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 40 ++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c index c0117c5..0b68065 100644 --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c @@ -122,6 +122,7 @@ static const struct pinctrl_pin_desc lpass_lpi_pins[] = { PINCTRL_PIN(11, "gpio11"), PINCTRL_PIN(12, "gpio12"), PINCTRL_PIN(13, "gpio13"), + PINCTRL_PIN(14, "gpio14"), }; @@ -137,6 +138,7 @@ enum lpass_lpi_functions { LPI_MUX_i2s1_ws, LPI_MUX_i2s2_clk, LPI_MUX_i2s2_data, + LPI_MUX_sc7280_i2s2_data, LPI_MUX_i2s2_ws, LPI_MUX_qua_mi2s_data, LPI_MUX_qua_mi2s_sclk, @@ -145,6 +147,7 @@ enum lpass_lpi_functions { LPI_MUX_swr_rx_data, LPI_MUX_swr_tx_clk, LPI_MUX_swr_tx_data, + LPI_MUX_sc7280_swr_tx_data, LPI_MUX_wsa_swr_clk, LPI_MUX_wsa_swr_data, LPI_MUX_gpio, @@ -165,8 +168,11 @@ static const unsigned int gpio10_pins[] = { 10 }; static const unsigned int gpio11_pins[] = { 11 }; static const unsigned int gpio12_pins[] = { 12 }; static const unsigned int gpio13_pins[] = { 13 }; +static const unsigned int gpio14_pins[] = { 14 }; + static const char * const swr_tx_clk_groups[] = { "gpio0" }; static const char * const swr_tx_data_groups[] = { "gpio1", "gpio2", "gpio5" }; +static const char * const sc7280_swr_tx_data_groups[] = { "gpio1", "gpio2", "gpio14" }; static const char * const swr_rx_clk_groups[] = { "gpio3" }; static const char * const swr_rx_data_groups[] = { "gpio4", "gpio5" }; static const char * const dmic1_clk_groups[] = { "gpio6" }; @@ -186,6 +192,7 @@ static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" }; static const char * const wsa_swr_clk_groups[] = { "gpio10" }; static const char * const wsa_swr_data_groups[] = { "gpio11" }; static const char * const i2s2_data_groups[] = { "gpio12", "gpio12" }; +static const char * const sc7280_i2s2_data_groups[] = { "gpio12", "gpio13" }; static const struct lpi_pingroup sm8250_groups[] = { LPI_PINGROUP(0, 0, swr_tx_clk, qua_mi2s_sclk, _, _), @@ -204,6 +211,24 @@ static const struct lpi_pingroup sm8250_groups[] = { LPI_PINGROUP(13, NO_SLEW, dmic3_data, i2s2_data, _, _), }; +static const struct lpi_pingroup sc7280_groups[] = { + LPI_PINGROUP(0, 0, swr_tx_clk, qua_mi2s_sclk, _, _), + LPI_PINGROUP(1, 2, swr_tx_data, qua_mi2s_ws, _, _), + LPI_PINGROUP(2, 4, swr_tx_data, qua_mi2s_data, _, _), + LPI_PINGROUP(3, 8, swr_rx_clk, qua_mi2s_data, _, _), + LPI_PINGROUP(4, 10, swr_rx_data, qua_mi2s_data, _, _), + LPI_PINGROUP(5, 12, swr_rx_data, _, _, _), + LPI_PINGROUP(6, NO_SLEW, dmic1_clk, i2s1_clk, _, _), + LPI_PINGROUP(7, NO_SLEW, dmic1_data, i2s1_ws, _, _), + LPI_PINGROUP(8, NO_SLEW, dmic2_clk, i2s1_data, _, _), + LPI_PINGROUP(9, NO_SLEW, dmic2_data, i2s1_data, _, _), + LPI_PINGROUP(10, 16, i2s2_clk, wsa_swr_clk, _, _), + LPI_PINGROUP(11, 18, i2s2_ws, wsa_swr_data, _, _), + LPI_PINGROUP(12, NO_SLEW, dmic3_clk, sc7280_i2s2_data, _, _), + LPI_PINGROUP(13, NO_SLEW, dmic3_data, sc7280_i2s2_data, _, _), + LPI_PINGROUP(14, 6, sc7280_swr_tx_data, _, _, _), +}; + static const struct lpi_function lpass_functions[] = { LPI_FUNCTION(dmic1_clk), LPI_FUNCTION(dmic1_data), @@ -216,6 +241,7 @@ static const struct lpi_function lpass_functions[] = { LPI_FUNCTION(i2s1_ws), LPI_FUNCTION(i2s2_clk), LPI_FUNCTION(i2s2_data), + LPI_FUNCTION(sc7280_i2s2_data), LPI_FUNCTION(i2s2_ws), LPI_FUNCTION(qua_mi2s_data), LPI_FUNCTION(qua_mi2s_sclk), @@ -224,6 +250,7 @@ static const struct lpi_function lpass_functions[] = { LPI_FUNCTION(swr_rx_data), LPI_FUNCTION(swr_tx_clk), LPI_FUNCTION(swr_tx_data), + LPI_FUNCTION(sc7280_swr_tx_data), LPI_FUNCTION(wsa_swr_clk), LPI_FUNCTION(wsa_swr_data), }; @@ -237,6 +264,15 @@ static struct lpi_pinctrl_variant_data sm8250_lpi_data = { .nfunctions = ARRAY_SIZE(lpass_functions), }; +static struct lpi_pinctrl_variant_data sc7280_lpi_data = { + .pins = lpass_lpi_pins, + .npins = ARRAY_SIZE(lpass_lpi_pins), + .groups = sc7280_groups, + .ngroups = ARRAY_SIZE(sc7280_groups), + .functions = lpass_functions, + .nfunctions = ARRAY_SIZE(lpass_functions), +}; + static int lpi_gpio_read(struct lpi_pinctrl *state, unsigned int pin, unsigned int addr) { @@ -678,6 +714,10 @@ static const struct of_device_id lpi_pinctrl_of_match[] = { .compatible = "qcom,sm8250-lpass-lpi-pinctrl", .data = &sm8250_lpi_data, }, + { + .compatible = "qcom,sc7280-lpass-lpi-pinctrl", + .data = &sc7280_lpi_data, + }, { } }; MODULE_DEVICE_TABLE(of, lpi_pinctrl_of_match); -- Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
WARNING: multiple messages have this Message-ID (diff)
From: Srinivasa Rao Mandadapu <srivasam@codeaurora.org> To: agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, plai@codeaurora.org, bgoswami@codeaurora.org, perex@perex.cz, tiwai@suse.com, srinivas.kandagatla@linaro.org, rohitkr@codeaurora.org, linux-arm-msm@vger.kernel.org, alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, swboyd@chromium.org, judyhsiao@chromium.org Cc: Venkata Prasad Potturu <potturu@codeaurora.org>, Srinivasa Rao Mandadapu <srivasam@codeaurora.org> Subject: [PATCH 3/3] pinctrl: qcom: Add SC7280 lpass pin configuration Date: Thu, 7 Oct 2021 19:18:39 +0530 [thread overview] Message-ID: <1633614519-26680-4-git-send-email-srivasam@codeaurora.org> (raw) In-Reply-To: <1633614519-26680-1-git-send-email-srivasam@codeaurora.org> Update pin control support for SC7280 LPASS LPI. Signed-off-by: Venkata Prasad Potturu <potturu@codeaurora.org> Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org> --- drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 40 ++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c index c0117c5..0b68065 100644 --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c @@ -122,6 +122,7 @@ static const struct pinctrl_pin_desc lpass_lpi_pins[] = { PINCTRL_PIN(11, "gpio11"), PINCTRL_PIN(12, "gpio12"), PINCTRL_PIN(13, "gpio13"), + PINCTRL_PIN(14, "gpio14"), }; @@ -137,6 +138,7 @@ enum lpass_lpi_functions { LPI_MUX_i2s1_ws, LPI_MUX_i2s2_clk, LPI_MUX_i2s2_data, + LPI_MUX_sc7280_i2s2_data, LPI_MUX_i2s2_ws, LPI_MUX_qua_mi2s_data, LPI_MUX_qua_mi2s_sclk, @@ -145,6 +147,7 @@ enum lpass_lpi_functions { LPI_MUX_swr_rx_data, LPI_MUX_swr_tx_clk, LPI_MUX_swr_tx_data, + LPI_MUX_sc7280_swr_tx_data, LPI_MUX_wsa_swr_clk, LPI_MUX_wsa_swr_data, LPI_MUX_gpio, @@ -165,8 +168,11 @@ static const unsigned int gpio10_pins[] = { 10 }; static const unsigned int gpio11_pins[] = { 11 }; static const unsigned int gpio12_pins[] = { 12 }; static const unsigned int gpio13_pins[] = { 13 }; +static const unsigned int gpio14_pins[] = { 14 }; + static const char * const swr_tx_clk_groups[] = { "gpio0" }; static const char * const swr_tx_data_groups[] = { "gpio1", "gpio2", "gpio5" }; +static const char * const sc7280_swr_tx_data_groups[] = { "gpio1", "gpio2", "gpio14" }; static const char * const swr_rx_clk_groups[] = { "gpio3" }; static const char * const swr_rx_data_groups[] = { "gpio4", "gpio5" }; static const char * const dmic1_clk_groups[] = { "gpio6" }; @@ -186,6 +192,7 @@ static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" }; static const char * const wsa_swr_clk_groups[] = { "gpio10" }; static const char * const wsa_swr_data_groups[] = { "gpio11" }; static const char * const i2s2_data_groups[] = { "gpio12", "gpio12" }; +static const char * const sc7280_i2s2_data_groups[] = { "gpio12", "gpio13" }; static const struct lpi_pingroup sm8250_groups[] = { LPI_PINGROUP(0, 0, swr_tx_clk, qua_mi2s_sclk, _, _), @@ -204,6 +211,24 @@ static const struct lpi_pingroup sm8250_groups[] = { LPI_PINGROUP(13, NO_SLEW, dmic3_data, i2s2_data, _, _), }; +static const struct lpi_pingroup sc7280_groups[] = { + LPI_PINGROUP(0, 0, swr_tx_clk, qua_mi2s_sclk, _, _), + LPI_PINGROUP(1, 2, swr_tx_data, qua_mi2s_ws, _, _), + LPI_PINGROUP(2, 4, swr_tx_data, qua_mi2s_data, _, _), + LPI_PINGROUP(3, 8, swr_rx_clk, qua_mi2s_data, _, _), + LPI_PINGROUP(4, 10, swr_rx_data, qua_mi2s_data, _, _), + LPI_PINGROUP(5, 12, swr_rx_data, _, _, _), + LPI_PINGROUP(6, NO_SLEW, dmic1_clk, i2s1_clk, _, _), + LPI_PINGROUP(7, NO_SLEW, dmic1_data, i2s1_ws, _, _), + LPI_PINGROUP(8, NO_SLEW, dmic2_clk, i2s1_data, _, _), + LPI_PINGROUP(9, NO_SLEW, dmic2_data, i2s1_data, _, _), + LPI_PINGROUP(10, 16, i2s2_clk, wsa_swr_clk, _, _), + LPI_PINGROUP(11, 18, i2s2_ws, wsa_swr_data, _, _), + LPI_PINGROUP(12, NO_SLEW, dmic3_clk, sc7280_i2s2_data, _, _), + LPI_PINGROUP(13, NO_SLEW, dmic3_data, sc7280_i2s2_data, _, _), + LPI_PINGROUP(14, 6, sc7280_swr_tx_data, _, _, _), +}; + static const struct lpi_function lpass_functions[] = { LPI_FUNCTION(dmic1_clk), LPI_FUNCTION(dmic1_data), @@ -216,6 +241,7 @@ static const struct lpi_function lpass_functions[] = { LPI_FUNCTION(i2s1_ws), LPI_FUNCTION(i2s2_clk), LPI_FUNCTION(i2s2_data), + LPI_FUNCTION(sc7280_i2s2_data), LPI_FUNCTION(i2s2_ws), LPI_FUNCTION(qua_mi2s_data), LPI_FUNCTION(qua_mi2s_sclk), @@ -224,6 +250,7 @@ static const struct lpi_function lpass_functions[] = { LPI_FUNCTION(swr_rx_data), LPI_FUNCTION(swr_tx_clk), LPI_FUNCTION(swr_tx_data), + LPI_FUNCTION(sc7280_swr_tx_data), LPI_FUNCTION(wsa_swr_clk), LPI_FUNCTION(wsa_swr_data), }; @@ -237,6 +264,15 @@ static struct lpi_pinctrl_variant_data sm8250_lpi_data = { .nfunctions = ARRAY_SIZE(lpass_functions), }; +static struct lpi_pinctrl_variant_data sc7280_lpi_data = { + .pins = lpass_lpi_pins, + .npins = ARRAY_SIZE(lpass_lpi_pins), + .groups = sc7280_groups, + .ngroups = ARRAY_SIZE(sc7280_groups), + .functions = lpass_functions, + .nfunctions = ARRAY_SIZE(lpass_functions), +}; + static int lpi_gpio_read(struct lpi_pinctrl *state, unsigned int pin, unsigned int addr) { @@ -678,6 +714,10 @@ static const struct of_device_id lpi_pinctrl_of_match[] = { .compatible = "qcom,sm8250-lpass-lpi-pinctrl", .data = &sm8250_lpi_data, }, + { + .compatible = "qcom,sc7280-lpass-lpi-pinctrl", + .data = &sc7280_lpi_data, + }, { } }; MODULE_DEVICE_TABLE(of, lpi_pinctrl_of_match); -- Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
next prev parent reply other threads:[~2021-10-07 13:49 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-10-07 13:48 [PATCH 0/3] Add pin control support for lpass sc7280 Srinivasa Rao Mandadapu 2021-10-07 13:48 ` [PATCH 1/3] pinctrl: qcom: Update lpass variant independent functions as generic Srinivasa Rao Mandadapu 2021-10-07 13:48 ` Srinivasa Rao Mandadapu 2021-10-07 17:57 ` Stephen Boyd 2021-10-27 7:42 ` Srinivasa Rao Mandadapu 2021-10-07 13:48 ` [PATCH 2/3] dt-bindings: pinctrl: qcom: Add sc7280 lpass lpi pinctrl compatible Srinivasa Rao Mandadapu 2021-10-07 13:48 ` Srinivasa Rao Mandadapu 2021-10-07 17:59 ` Stephen Boyd 2021-10-27 7:47 ` Srinivasa Rao Mandadapu 2021-10-28 22:22 ` Stephen Boyd 2021-10-08 2:46 ` Rob Herring 2021-10-08 2:46 ` Rob Herring 2021-10-07 13:48 ` Srinivasa Rao Mandadapu [this message] 2021-10-07 13:48 ` [PATCH 3/3] pinctrl: qcom: Add SC7280 lpass pin configuration Srinivasa Rao Mandadapu 2021-10-07 17:54 ` Stephen Boyd 2021-10-27 7:48 ` Srinivasa Rao Mandadapu
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