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From: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
To: <agross@kernel.org>, <bjorn.andersson@linaro.org>,
	<lgirdwood@gmail.com>, <broonie@kernel.org>, <robh+dt@kernel.org>,
	<plai@codeaurora.org>, <bgoswami@codeaurora.org>,
	<perex@perex.cz>, <tiwai@suse.com>,
	<srinivas.kandagatla@linaro.org>, <rohitkr@codeaurora.org>,
	<linux-arm-msm@vger.kernel.org>, <alsa-devel@alsa-project.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<swboyd@chromium.org>, <judyhsiao@chromium.org>,
	Linus Walleij <linus.walleij@linaro.org>,
	<linux-gpio@vger.kernel.org>
Cc: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>,
	"Venkata Prasad Potturu" <quic_potturu@quicinc.com>
Subject: [PATCH v5 5/5] pinctrl: qcom: Update clock voting as optional
Date: Tue, 7 Dec 2021 21:05:39 +0530	[thread overview]
Message-ID: <1638891339-21806-6-git-send-email-quic_srivasam@quicinc.com> (raw)
In-Reply-To: <1638891339-21806-1-git-send-email-quic_srivasam@quicinc.com>

Update bulk clock voting to optional voting as ADSP bypass platform doesn't
need macro and decodec clocks, these are maintained as power domains and
operated from lpass audio core cc.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
---
 drivers/pinctrl/qcom/pinctrl-lpass-lpi.c        | 16 +++++++++-------
 drivers/pinctrl/qcom/pinctrl-lpass-lpi.h        |  1 +
 drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c |  1 +
 3 files changed, 11 insertions(+), 7 deletions(-)

diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
index 23cf133..bc288ed 100644
--- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
+++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
@@ -408,13 +408,15 @@ int lpi_pinctrl_probe(struct platform_device *pdev)
 		return dev_err_probe(dev, PTR_ERR(pctrl->slew_base),
 				     "Slew resource not provided\n");
 
-	ret = devm_clk_bulk_get(dev, MAX_LPI_NUM_CLKS, pctrl->clks);
-	if (ret)
-		return dev_err_probe(dev, ret, "Can't get clocks\n");
-
-	ret = clk_bulk_prepare_enable(MAX_LPI_NUM_CLKS, pctrl->clks);
-	if (ret)
-		return dev_err_probe(dev, ret, "Can't enable clocks\n");
+	if (!data->is_clk_optional) {
+		ret = devm_clk_bulk_get(dev, MAX_LPI_NUM_CLKS, pctrl->clks);
+		if (ret)
+			return dev_err_probe(dev, ret, "Can't get clocks\n");
+
+		ret = clk_bulk_prepare_enable(MAX_LPI_NUM_CLKS, pctrl->clks);
+		if (ret)
+			return dev_err_probe(dev, ret, "Can't enable clocks\n");
+	}
 
 	pctrl->desc.pctlops = &lpi_gpio_pinctrl_ops;
 	pctrl->desc.pmxops = &lpi_gpio_pinmux_ops;
diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h
index 99c5e4b..5908c27 100644
--- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h
+++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h
@@ -75,6 +75,7 @@ struct lpi_pinctrl_variant_data {
 	int ngroups;
 	const struct lpi_function *functions;
 	int nfunctions;
+	int is_clk_optional;
 };
 
 int lpi_pinctrl_probe(struct platform_device *pdev);
diff --git a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c
index 94bec15..d9e404b 100644
--- a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c
+++ b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c
@@ -143,6 +143,7 @@ static const struct lpi_pinctrl_variant_data sc7280_lpi_data = {
 	.ngroups = ARRAY_SIZE(sc7280_groups),
 	.functions = sc7280_functions,
 	.nfunctions = ARRAY_SIZE(sc7280_functions),
+	.is_clk_optional = 1,
 };
 
 static const struct of_device_id lpi_pinctrl_of_match[] = {
-- 
2.7.4


WARNING: multiple messages have this Message-ID (diff)
From: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
To: <agross@kernel.org>, <bjorn.andersson@linaro.org>,
	<lgirdwood@gmail.com>,  <broonie@kernel.org>,
	<robh+dt@kernel.org>, <plai@codeaurora.org>,
	<bgoswami@codeaurora.org>, <perex@perex.cz>, <tiwai@suse.com>,
	<srinivas.kandagatla@linaro.org>, <rohitkr@codeaurora.org>,
	<linux-arm-msm@vger.kernel.org>, <alsa-devel@alsa-project.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<swboyd@chromium.org>, <judyhsiao@chromium.org>,
	Linus Walleij <linus.walleij@linaro.org>,
	<linux-gpio@vger.kernel.org>
Cc: Venkata Prasad Potturu <quic_potturu@quicinc.com>,
	Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Subject: [PATCH v5 5/5] pinctrl: qcom: Update clock voting as optional
Date: Tue, 7 Dec 2021 21:05:39 +0530	[thread overview]
Message-ID: <1638891339-21806-6-git-send-email-quic_srivasam@quicinc.com> (raw)
In-Reply-To: <1638891339-21806-1-git-send-email-quic_srivasam@quicinc.com>

Update bulk clock voting to optional voting as ADSP bypass platform doesn't
need macro and decodec clocks, these are maintained as power domains and
operated from lpass audio core cc.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
---
 drivers/pinctrl/qcom/pinctrl-lpass-lpi.c        | 16 +++++++++-------
 drivers/pinctrl/qcom/pinctrl-lpass-lpi.h        |  1 +
 drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c |  1 +
 3 files changed, 11 insertions(+), 7 deletions(-)

diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
index 23cf133..bc288ed 100644
--- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
+++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
@@ -408,13 +408,15 @@ int lpi_pinctrl_probe(struct platform_device *pdev)
 		return dev_err_probe(dev, PTR_ERR(pctrl->slew_base),
 				     "Slew resource not provided\n");
 
-	ret = devm_clk_bulk_get(dev, MAX_LPI_NUM_CLKS, pctrl->clks);
-	if (ret)
-		return dev_err_probe(dev, ret, "Can't get clocks\n");
-
-	ret = clk_bulk_prepare_enable(MAX_LPI_NUM_CLKS, pctrl->clks);
-	if (ret)
-		return dev_err_probe(dev, ret, "Can't enable clocks\n");
+	if (!data->is_clk_optional) {
+		ret = devm_clk_bulk_get(dev, MAX_LPI_NUM_CLKS, pctrl->clks);
+		if (ret)
+			return dev_err_probe(dev, ret, "Can't get clocks\n");
+
+		ret = clk_bulk_prepare_enable(MAX_LPI_NUM_CLKS, pctrl->clks);
+		if (ret)
+			return dev_err_probe(dev, ret, "Can't enable clocks\n");
+	}
 
 	pctrl->desc.pctlops = &lpi_gpio_pinctrl_ops;
 	pctrl->desc.pmxops = &lpi_gpio_pinmux_ops;
diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h
index 99c5e4b..5908c27 100644
--- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h
+++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h
@@ -75,6 +75,7 @@ struct lpi_pinctrl_variant_data {
 	int ngroups;
 	const struct lpi_function *functions;
 	int nfunctions;
+	int is_clk_optional;
 };
 
 int lpi_pinctrl_probe(struct platform_device *pdev);
diff --git a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c
index 94bec15..d9e404b 100644
--- a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c
+++ b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c
@@ -143,6 +143,7 @@ static const struct lpi_pinctrl_variant_data sc7280_lpi_data = {
 	.ngroups = ARRAY_SIZE(sc7280_groups),
 	.functions = sc7280_functions,
 	.nfunctions = ARRAY_SIZE(sc7280_functions),
+	.is_clk_optional = 1,
 };
 
 static const struct of_device_id lpi_pinctrl_of_match[] = {
-- 
2.7.4


  parent reply	other threads:[~2021-12-07 15:36 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-07 15:35 [PATCH v5 0/5] Add pin control support for lpass sc7280 Srinivasa Rao Mandadapu
2021-12-07 15:35 ` [PATCH v5 1/5] dt-bindings: pinctrl: qcom: Update lpass lpi file name to SoC specific Srinivasa Rao Mandadapu
2021-12-07 15:35   ` Srinivasa Rao Mandadapu
2021-12-10 21:15   ` Rob Herring
2021-12-10 21:15     ` Rob Herring
2021-12-07 15:35 ` [PATCH v5 2/5] dt-bindings: pinctrl: qcom: Add sc7280 lpass lpi pinctrl bindings Srinivasa Rao Mandadapu
2021-12-07 15:35   ` Srinivasa Rao Mandadapu
2021-12-08  9:24   ` Srinivas Kandagatla
2021-12-08 10:11     ` Srinivasa Rao Mandadapu
2021-12-10 21:17       ` Rob Herring
2021-12-10 21:17         ` Rob Herring
2021-12-10 21:18   ` Rob Herring
2021-12-10 21:18     ` Rob Herring
2021-12-07 15:35 ` [PATCH v5 3/5] pinctrl: qcom: Extract chip specific LPASS LPI code Srinivasa Rao Mandadapu
2021-12-07 15:35   ` Srinivasa Rao Mandadapu
2021-12-08  6:28   ` Andy Shevchenko
2021-12-08  6:28     ` Andy Shevchenko
2021-12-14 17:15     ` Srinivasa Rao Mandadapu
2021-12-14 17:15       ` Srinivasa Rao Mandadapu
2021-12-14 17:16       ` Andy Shevchenko
2021-12-14 17:16         ` Andy Shevchenko
2021-12-14 17:22         ` Srinivasa Rao Mandadapu
2021-12-14 17:22           ` Srinivasa Rao Mandadapu
2021-12-14 17:37           ` Andy Shevchenko
2021-12-14 17:37             ` Andy Shevchenko
2021-12-07 15:35 ` [PATCH v5 4/5] pinctrl: qcom: Add SC7280 lpass pin configuration Srinivasa Rao Mandadapu
2021-12-07 15:35   ` Srinivasa Rao Mandadapu
2021-12-07 15:35 ` Srinivasa Rao Mandadapu [this message]
2021-12-07 15:35   ` [PATCH v5 5/5] pinctrl: qcom: Update clock voting as optional Srinivasa Rao Mandadapu
2021-12-15  1:28 ` [PATCH v5 0/5] Add pin control support for lpass sc7280 Stephen Boyd

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