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From: Sameer Pujar <spujar@nvidia.com>
To: <broonie@kernel.org>, <perex@perex.cz>, <tiwai@suse.com>,
	<dan.carpenter@oracle.com>
Cc: <thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
	<alsa-devel@alsa-project.org>, <linux-tegra@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, Sameer Pujar <spujar@nvidia.com>
Subject: [PATCH] ASoC: tegra: Fix MBDRC bypass mode check
Date: Wed, 15 Jun 2022 10:08:34 +0530	[thread overview]
Message-ID: <1655267914-24702-1-git-send-email-spujar@nvidia.com> (raw)

MBDRC supports different modes of operation. There is no configuration
required for bypass mode. The hw_params() call does not filter bypass
mode correctly and it leads to following Smatch static checker warning:

  sound/soc/tegra/tegra210_mbdrc.c:778 tegra210_mbdrc_hw_params()
  warn: bitwise AND condition is false here

Fix this condition by using proper mode mask and just return for bypass
mode.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Fixes: 7358a803c778 ("ASoC: tegra: Add Tegra210 based OPE driver")
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
---
 sound/soc/tegra/tegra210_mbdrc.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/sound/soc/tegra/tegra210_mbdrc.c b/sound/soc/tegra/tegra210_mbdrc.c
index 7d9da33..d786daa 100644
--- a/sound/soc/tegra/tegra210_mbdrc.c
+++ b/sound/soc/tegra/tegra210_mbdrc.c
@@ -775,7 +775,9 @@ int tegra210_mbdrc_hw_params(struct snd_soc_component *cmpnt)
 
 	regmap_read(ope->mbdrc_regmap, TEGRA210_MBDRC_CFG, &val);
 
-	if (val & TEGRA210_MBDRC_CFG_MBDRC_MODE_BYPASS)
+	val &= TEGRA210_MBDRC_CFG_MBDRC_MODE_MASK;
+
+	if (val == TEGRA210_MBDRC_CFG_MBDRC_MODE_BYPASS)
 		return 0;
 
 	for (i = 0; i < MBDRC_NUM_BAND; i++) {
-- 
2.7.4


WARNING: multiple messages have this Message-ID (diff)
From: Sameer Pujar <spujar@nvidia.com>
To: <broonie@kernel.org>, <perex@perex.cz>, <tiwai@suse.com>,
	<dan.carpenter@oracle.com>
Cc: alsa-devel@alsa-project.org, Sameer Pujar <spujar@nvidia.com>,
	linux-kernel@vger.kernel.org, jonathanh@nvidia.com,
	thierry.reding@gmail.com, linux-tegra@vger.kernel.org
Subject: [PATCH] ASoC: tegra: Fix MBDRC bypass mode check
Date: Wed, 15 Jun 2022 10:08:34 +0530	[thread overview]
Message-ID: <1655267914-24702-1-git-send-email-spujar@nvidia.com> (raw)

MBDRC supports different modes of operation. There is no configuration
required for bypass mode. The hw_params() call does not filter bypass
mode correctly and it leads to following Smatch static checker warning:

  sound/soc/tegra/tegra210_mbdrc.c:778 tegra210_mbdrc_hw_params()
  warn: bitwise AND condition is false here

Fix this condition by using proper mode mask and just return for bypass
mode.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Fixes: 7358a803c778 ("ASoC: tegra: Add Tegra210 based OPE driver")
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
---
 sound/soc/tegra/tegra210_mbdrc.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/sound/soc/tegra/tegra210_mbdrc.c b/sound/soc/tegra/tegra210_mbdrc.c
index 7d9da33..d786daa 100644
--- a/sound/soc/tegra/tegra210_mbdrc.c
+++ b/sound/soc/tegra/tegra210_mbdrc.c
@@ -775,7 +775,9 @@ int tegra210_mbdrc_hw_params(struct snd_soc_component *cmpnt)
 
 	regmap_read(ope->mbdrc_regmap, TEGRA210_MBDRC_CFG, &val);
 
-	if (val & TEGRA210_MBDRC_CFG_MBDRC_MODE_BYPASS)
+	val &= TEGRA210_MBDRC_CFG_MBDRC_MODE_MASK;
+
+	if (val == TEGRA210_MBDRC_CFG_MBDRC_MODE_BYPASS)
 		return 0;
 
 	for (i = 0; i < MBDRC_NUM_BAND; i++) {
-- 
2.7.4


             reply	other threads:[~2022-06-15  4:38 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-15  4:38 Sameer Pujar [this message]
2022-06-15  4:38 ` [PATCH] ASoC: tegra: Fix MBDRC bypass mode check Sameer Pujar
2022-06-15 13:54 ` Mark Brown
2022-06-15 13:54   ` Mark Brown

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