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From: Jianmin Lv <lvjianmin@loongson.cn>
To: Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>
Cc: linux-kernel@vger.kernel.org, Hanjun Guo <guohanjun@huawei.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Jiaxun Yang <jiaxun.yang@flygoat.com>,
	Huacai Chen <chenhuacai@loongson.cn>
Subject: [PATCH V14 01/15] ACPICA: MADT: Add LoongArch APICs support
Date: Sun,  3 Jul 2022 16:45:18 +0800	[thread overview]
Message-ID: <1656837932-18257-2-git-send-email-lvjianmin@loongson.cn> (raw)
In-Reply-To: <1656837932-18257-1-git-send-email-lvjianmin@loongson.cn>

From: Huacai Chen <chenhuacai@loongson.cn>

LoongArch-specific interrupt controllers (similar to APIC) are added
in the next revision of ACPI Specification (current revision is 6.4),
which including CORE_PIC (CPUINTC), LIO_PIC (LIOINTC), EIO_PIC (EIOINTC),
HT_PIC (HTVECINTC), BIO_PIC (PCHINTC), LPC_PIC (PCHLPC) and MSI_PIC
(PCHMSI). This patch add their definition.

ACPI changes of LoongArch-specific interrupt controllers have already
been approved in the ECRs, and will be public in the next revision of
ACPI Specification.

Reference: https://mantis.uefi.org/mantis/view.php?id=2203
Reference: https://mantis.uefi.org/mantis/view.php?id=2313
Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
---
 include/acpi/actbl2.h | 127 +++++++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 125 insertions(+), 2 deletions(-)

diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h
index 655102b..323bdd6 100644
--- a/include/acpi/actbl2.h
+++ b/include/acpi/actbl2.h
@@ -865,7 +865,14 @@ enum acpi_madt_type {
 	ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
 	ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
 	ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16,
-	ACPI_MADT_TYPE_RESERVED = 17,	/* 17 to 0x7F are reserved */
+	ACPI_MADT_TYPE_CORE_PIC = 17,
+	ACPI_MADT_TYPE_LIO_PIC = 18,
+	ACPI_MADT_TYPE_HT_PIC = 19,
+	ACPI_MADT_TYPE_EIO_PIC = 20,
+	ACPI_MADT_TYPE_MSI_PIC = 21,
+	ACPI_MADT_TYPE_BIO_PIC = 22,
+	ACPI_MADT_TYPE_LPC_PIC = 23,
+	ACPI_MADT_TYPE_RESERVED = 24,	/* 24 to 0x7F are reserved */
 	ACPI_MADT_TYPE_OEM_RESERVED = 0x80	/* 0x80 to 0xFF are reserved for OEM use */
 };
 
@@ -1096,7 +1103,123 @@ struct acpi_madt_multiproc_wakeup_mailbox {
 
 #define ACPI_MP_WAKE_COMMAND_WAKEUP    1
 
-/* 17: OEM data */
+/* Values for Version field above */
+
+enum acpi_madt_core_pic_version {
+	ACPI_MADT_CORE_PIC_VERSION_NONE = 0,
+	ACPI_MADT_CORE_PIC_VERSION_V1 = 1,
+	ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2	/* 2 and greater are reserved */
+};
+
+enum acpi_madt_lio_pic_version {
+	ACPI_MADT_LIO_PIC_VERSION_NONE = 0,
+	ACPI_MADT_LIO_PIC_VERSION_V1 = 1,
+	ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2	/* 2 and greater are reserved */
+};
+
+enum acpi_madt_eio_pic_version {
+	ACPI_MADT_EIO_PIC_VERSION_NONE = 0,
+	ACPI_MADT_EIO_PIC_VERSION_V1 = 1,
+	ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2	/* 2 and greater are reserved */
+};
+
+enum acpi_madt_ht_pic_version {
+	ACPI_MADT_HT_PIC_VERSION_NONE = 0,
+	ACPI_MADT_HT_PIC_VERSION_V1 = 1,
+	ACPI_MADT_HT_PIC_VERSION_RESERVED = 2	/* 2 and greater are reserved */
+};
+
+enum acpi_madt_bio_pic_version {
+	ACPI_MADT_BIO_PIC_VERSION_NONE = 0,
+	ACPI_MADT_BIO_PIC_VERSION_V1 = 1,
+	ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2	/* 2 and greater are reserved */
+};
+
+enum acpi_madt_msi_pic_version {
+	ACPI_MADT_MSI_PIC_VERSION_NONE = 0,
+	ACPI_MADT_MSI_PIC_VERSION_V1 = 1,
+	ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2	/* 2 and greater are reserved */
+};
+
+enum acpi_madt_lpc_pic_version {
+	ACPI_MADT_LPC_PIC_VERSION_NONE = 0,
+	ACPI_MADT_LPC_PIC_VERSION_V1 = 1,
+	ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2	/* 2 and greater are reserved */
+};
+
+/* Core Interrupt Controller */
+
+struct acpi_madt_core_pic {
+	struct acpi_subtable_header header;
+	u8 version;
+	u32 processor_id;
+	u32 core_id;
+	u32 flags;
+};
+
+/* Legacy I/O Interrupt Controller */
+
+struct acpi_madt_lio_pic {
+	struct acpi_subtable_header header;
+	u8 version;
+	u64 address;
+	u16 size;
+	u8 cascade[2];
+	u32 cascade_map[2];
+};
+
+/* Extend I/O Interrupt Controller */
+
+struct acpi_madt_eio_pic {
+	struct acpi_subtable_header header;
+	u8 version;
+	u8 cascade;
+	u8 node;
+	u64 node_map;
+};
+
+/* HT Interrupt Controller */
+
+struct acpi_madt_ht_pic {
+	struct acpi_subtable_header header;
+	u8 version;
+	u64 address;
+	u16 size;
+	u8 cascade[8];
+};
+
+/* Bridge I/O Interrupt Controller */
+
+struct acpi_madt_bio_pic {
+	struct acpi_subtable_header header;
+	u8 version;
+	u64 address;
+	u16 size;
+	u16 id;
+	u16 gsi_base;
+};
+
+/* MSI Interrupt Controller */
+
+struct acpi_madt_msi_pic {
+	struct acpi_subtable_header header;
+	u8 version;
+	u64 msg_address;
+	u32 start;
+	u32 count;
+};
+
+/* LPC Interrupt Controller */
+
+struct acpi_madt_lpc_pic {
+	struct acpi_subtable_header header;
+	u8 version;
+	u64 address;
+	u16 size;
+	u8 cascade;
+};
+
+/* 80: OEM data */
 
 struct acpi_madt_oem_data {
 	u8 oem_data[0];
-- 
1.8.3.1


  reply	other threads:[~2022-07-03  8:45 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-03  8:45 [PATCH V14 00/15] irqchip: Add LoongArch-related irqchip drivers Jianmin Lv
2022-07-03  8:45 ` Jianmin Lv [this message]
2022-07-07 10:18   ` [PATCH V14 01/15] ACPICA: MADT: Add LoongArch APICs support Marc Zyngier
2022-07-08  6:02     ` Jianmin Lv
2022-07-03  8:45 ` [PATCH V14 02/15] APCI: irq: Add support for multiple GSI domains Jianmin Lv
2022-07-07 10:16   ` Marc Zyngier
2022-07-08  3:21     ` Jianmin Lv
2022-07-03  8:45 ` [PATCH V14 03/15] ACPI: irq: Allow acpi_gsi_to_irq() to have an arch-specific fallback Jianmin Lv
2022-07-07 10:14   ` Marc Zyngier
2022-07-08  3:23     ` Jianmin Lv
2022-07-03  8:45 ` [PATCH V14 04/15] genirq/generic_chip: export irq_unmap_generic_chip Jianmin Lv
2022-07-03  8:45 ` [PATCH V14 05/15] LoongArch: Use ACPI_GENERIC_GSI for gsi handling Jianmin Lv
2022-07-03  8:45 ` [PATCH V14 06/15] irqchip: Add Loongson PCH LPC controller support Jianmin Lv
2022-07-03  8:45 ` [PATCH V14 07/15] irqchip/loongson-pch-pic: Add ACPI init support Jianmin Lv
2022-07-03 10:53   ` kernel test robot
2022-07-03  8:45 ` [PATCH V14 08/15] irqchip/loongson-pch-msi: " Jianmin Lv
2022-07-03  8:45 ` [PATCH V14 09/15] irqchip/loongson-htvec: " Jianmin Lv
2022-07-03  8:45 ` [PATCH V14 10/15] irqchip/loongson-liointc: " Jianmin Lv
2022-07-07 10:34   ` Marc Zyngier
2022-07-08  6:13     ` Jianmin Lv
2022-07-03  8:45 ` [PATCH V14 11/15] LoongArch: prepare to support multiple pch-pic and pch-msi irqdomain Jianmin Lv
2022-07-03  8:45 ` [PATCH V14 12/15] irqchip: Add Loongson Extended I/O interrupt controller support Jianmin Lv
2022-07-07 12:30   ` Marc Zyngier
2022-07-10 12:17     ` Jianmin Lv
2022-07-07 13:22   ` maobibo
2022-07-08 11:31     ` Jianmin Lv
2022-07-03  8:45 ` [PATCH V14 13/15] irqchip: Add LoongArch CPU " Jianmin Lv
2022-07-07 12:44   ` Marc Zyngier
2022-07-08  6:08     ` Jianmin Lv
2022-07-03  8:45 ` [PATCH V14 14/15] irqchip / ACPI: Introduce ACPI_IRQ_MODEL_LPIC for LoongArch Jianmin Lv
2022-07-07 12:59   ` Marc Zyngier
2022-07-08  3:17     ` Jianmin Lv
2022-07-14 10:02       ` Jianmin Lv
2022-07-14 10:21         ` Marc Zyngier
2022-07-03  8:45 ` [PATCH V14 15/15] LoongArch: Fix irq number for timer and ipi Jianmin Lv
2022-07-07 12:08 ` [PATCH V14 00/15] irqchip: Add LoongArch-related irqchip drivers Hu Zeyuan
2022-07-08  2:47   ` Jianmin Lv
2022-07-07 12:51 ` Marc Zyngier
2022-07-08 14:32   ` Moore, Robert

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